IEEE Instrumentation & Measurement - September 2023 - 19

Table 3 - Resource utilization in recently reported FPGA-based TDCs
Power (mW)
a
Work
Parsakordasiabi
2021 [3]
Zhang
2022 [11]
Zhu
2021 [10]
Szplet
2021 [19]
Garzetti
2021 [16]
Jiao
2021 [5]
Technology
Luts
Artix-7 XC7A200T
Zynq-7020
XC7Z020
Virtex-7
XC7VX485T
Virtex-7
XC7VX485T
Artix-7 200T
Virtex-6
XC6VLX240T
216/133800
(0.16%)
1551/53200
(2.91%)
1343/303600
(0.44%)
183/303600
(0.06%)
3694/133800
(2.76%)
765/150720
(0.5%)
FFs
628/267600
(0.24%)
2313/106400
(2.17%)
2396/607200
(0.39 %)
169/607200
(0.02%)
3738/267600
(1.3%)
793/301440
(0.26%)
low-end devices due to the earmarked budget. For this reason,
there is a need to propose resource-efficient TDC architectures
that can achieve femtosecond resolutions. This would facilitate
the implementation of systems with a greater number of
channels, allowing the exploration of low-cost colliders or PET
scanners. Thus far, only works [3], [11], and [19] have proposed
highly resource-efficient TDCs, but the obtained precision is
still around 20 ps, and the resolution is not less than 10 ps.
Potential Research Areas
Single-TDL-based Multichannel TDC
For TIM, a single-channel TDC is used for each input signal. In
some cases, it is necessary to use two TDCs to measure a single
time interval. Exploring how it is possible to perform measurements
from multiple input signals using a single TDC is an
area that has only recently begun to emerge. For example, in
[5], a strategy to perform parallel measurements on two input
signals using only one TDL was proposed. With this strategy, it
is possible to save resources without sacrificing measurement
precision. Nonetheless, this strategy is limited to two parallel
input signals. Yet, there is a lack of additional proposals on
how to perform parallel measurements using a single TDC.
Clock-free Coarse Measurement
All reported TDC use the Nutt method. The TDC operational
range is proportional to the number of bits in the CC. Using
a clock signal seems essential. Nevertheless, the clock signal
distribution begins at the edges of the chip; thus, different positions
of TDC signify different performances due to uneven
clock routing (which implies different delays) among every
TDC. Theoretically, this can be solved by creating a clock near
each TDC. Ring oscillators are used to achieve this and have
been successfully applied in ASIC technology but not in FPGA.
September 2023
DSPs
Clock
(MHz)
-
-
18/ 2800
(0.64%)
-
1
-
250
350
600
-
150
400
Dynamic
Power
Total Power
Consumption
b
MTC
164a/ 33b
1601a/ 340b
-
-
13.8
-
416
34
155
1650
36
200
The clock frequency generated by the ring oscillator depends
on the ring length in such a manner that a shorter TDL
creates a higher output frequency, achieving oscillation frequencies
higher than 1 GHz. This reduction can contribute to
resource-saving, assuming that the associated components
can work at such frequency. The limitation is that the clock frequency
is unstable because there is no feedback loop as in PLLs.
This is the main limitation to be applied on FPGAs, inconveniences
such as the clock instability must be solved before being
put into practice. Proposing ideas in this unexplored area could
contribute to understanding how to create FPGA-based multichannel
TDCs that are not dependent on a global clock signal.
Digital-To-Time Converters (DTCs)
Multichannel Digital-to-Time Converters (DTCs) can be
used to generate pulses whose width can be user-controllable
by selecting the appropriate digital value. Thus, these
devices can potentially be part of characterization systems
for TDCs.
FPGA-based DTCs use the same components used for
TDCs, where picoseconds resolution architectures are particularly
of interest among researchers. An instrument that
generates sufficiently precise pulses would make it possible
to validate the measurement precision achieved in the TDC.
Again, it is important to generate proposals that are oriented
to low-end devices to allow the implementation of prototypelevel
systems. Furthermore, it is still unclear how to preserve a
high performance when a DTC with tens or hundreds of channels
is needed.
Acknowledgment
This research was supported by Conacyt and PA PIIT-IG
100322 project for Nuclear Science Institute at National Autonomous
University of Mexico.
IEEE Instrumentation & Measurement Magazine
19
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