Evaluation Engineering - 24

EMBEDDED SYSTEMS

AN 8 GHZ PXI DUAL SP8T MULTIPLEXER
BASED ON MEMS SWITCHES
By Stewart Yang, Senior Systems Applications Engineer, Menlo Microsystems
Modern communication systems ranging from 5G cellular
to military radios are increasingly required to support a
growing number of channels and frequency bands, and it is
often essential to be able to accurately and efficiently test multiband and multi-port RF components that comprise these systems. Routing of the necessary signals will present a challenge
as the number of ports needed to support these multiport components are increasing, while maintaining critically important
low RF losses, fast switching speeds, and test throughput.
RF switch matrices provide automatic signal routing and
conditioning between test and measurement equipment and
devices under test in RF ATE systems and test benches. They
can be used to efficiently connect multiple inputs to multiple
outputs for test systems and route and multiplex signals between
the Devices Under Test (DUTs) and test equipment and systems.

Intel (Altera) Cyclone IV FPGA, the Altera device can support
PXI Gen 1 X1, X2, and X4 (2.5Gbps) speeds. The board includes
89V power supply circuits and a 64-channel high voltage pushpull driver device which can provide DC bias to control the
MEMS switches.
The MEMS switches are built on Menlo Micro's " Ideal Switch "
process and are activated via electrostatic force, and thus require a high voltage source for switching operation. The gate
of the switch is set for a bias of 0 VDC, which places the metal
cantilever beam in a non-deflected (off) state. Thus, the path
between RF input and output is isolated with an air gap, like a
traditional mechanical relay.
When the gate is set to its required actuation voltage of +89V,
the electrostatic force that exists between the gate and cantilever
beam is strong enough to cause it to deflect downward, forming
a connection with the contact and closing the switch (on state).
Switch matrix architecture with a twist
Given the low supply current necessary for the electrostatic
It is important to note that this article will focus on a variation operation, a single charge pump circuit is used to generate the
of the traditional switch matrix architecture. In this example +89V required by the MEMS switches. The card provides two
the design is built around eleven Menlo Micro MM5130 SP4T 2X17 (34-pin) connectors to allow flat cable connection to the
devices configured as a dual SP8T switch multiplexer. An im- SP8T RF boards.
portant definition between a switch matrix and multiplexer is
The RF board shown in Figure 2 uses eleven RF MEMS SP4T
that the multiplexer can connect one input to multiple outputs, switches to realize a SP8T switch configuration. All the unused
or multiple outputs to one input.
ports are terminated with a 50-ohm RF resistor. User connecThe design is configured as a single PXI card and operates up tions are made via nine mini SMP connectors per board to acto 8 GHz and is targeting the 5G Sub-6 GHz bands, as well as commodate two banks of nine RF connectors on a small PXI
general-purpose commercial RF applications. The multiplexer bracket space.
is integrated with an Intel (Altera)-driver controller board and
The MM5130 provides for an alternate connection method
all necessary biasing and high-voltage driver circuitry for the which can provide enhanced performance for certain RF paswitches. The design uses 18 Mini-SMP RF connectors, and the rameters such as RF isolation and return loss. This configuramultiplexer card is operated with a Windows software GUI to tion is called super-port. It consists of bypassing the RFC input
control full switch operation with Windows DLL drivers with port and using the remaining 4 channels as a symmetrically
APIs for operating the switch multiplexer with an ATE system. oriented SP3T or SPST or SPDT. In this design, the RF1 and RF3
The functional block diagram of the PXI Carrier Board is channels are connected by biasing both channels and used as
shown in Figure 1 below. The PXI carrier board is based on the a SPST configuration.
Figure 3 shows a photograph of the
SP8T RF board. Six-layer PCB stack up
Figure 1. PXI Carrier Board Functional Block Diagram
used with Roger 4003C as dielectric layer to get optimum RF performance. The
RF traces are routed on both top and
bottom layers and a Grounded CPW
(CPWG) transmission line is used for
the design.
Two important key factors that differentiates this switch multiplexer from
other mechanical or solid-state designs
is the Ideal Switch's low on resistance

EVALUATION ENGINEERING NOVEMBER/DECEMBER 2020

Evaluation Engineering

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