The File - Nov 1, 2008 - (Page 4)

Trends Managing threads, communications in multi-core partitioning By Richard A. Quinnell Contributing Technical Editor As more processor architectures turn to multi-core designs, embedded developers are left with significant software development challenges. Tool providers and industry organisations have been making incremental progress towards addressing those challenges with their latest step simplifying software partitioning among cores. Vendors warn, however, that software developers must learn how to think outside the linear execution box. Multicore processor architectures have been used in speciality applications such as cell phones for years. Now, however, generalpurpose processors are turning to multi-core architectures in droves. The traditional approach of speeding the clock to achieve faster execution has resulted in single-core processors consuming increasing amounts of power. To keep power use down while increasing performance, vendors have adopted the approach of integrating several, slower processors to do the work of the single fast one. Multiprocessing software development can present some significant challenges, however, in both software design and debugging. Tool developers have chipped away at some of these challenges in the past few years. For instance, several tools, including Wind River’s Workbench and ICE products, now support multicore debugging. Distributed operating system vendors, such as QNX Software, and multi-core processor vendors, such as Texas Instruments and Toshiba, also offer debugging tools that help developers visualise and find problems when code segments running on different processors develop unexpected interactions. Compilers and operating systems that support development of multi-threaded software—only a step away from multi-processing Figure: A tool that allows developers to describe the characteristics and connection topology of their design’s interprocessor communications channels. software—are also available. Even static analysis tools, such as those from Klocwork and GrammaTech, have leveraged multi-threading techniques to tackle the multicore challenge, helping developers identify potential deadlocks and race conditions even before attempting to execute code. One of the development challenges that tools have been hardest pressed to address, however, is shifting software from single-processor design to multi-core. It is a two-part process, according to John Carbone, vice president of marketing for embedded RTOS vendor Express Logic. “To move software to multi-core you first need to find a way to distribute the threads,” said Carbone, “then enable communications among the threads across processor boundaries.” The need for threads to communicate further complicates matters. It requires that developers incorporate mechanisms, such as message passing and semaphores, that sof t ware threads can use to exchange information and coordinate actions across processor boundaries. Without careful implementation these mechanisms often end up configuration-specific, locking the software design into the partitioning and hardware choices made early in development. If analysis later reveals that additional cores or a redistribution of threads is needed, the communications mechanisms may require considerable revision. Discuss Is the comms processor dead tech? With multi-core processors able to perform its functions, will the communications processor be driven to complete obsolescence? Discuss. Partition for performance The appropriate distribution or partitioning of threads among the processing elements is critical to use multiple cores effectively. Multicore hardware increases performance only to the extent that the cores remain busy. If the software is not partitioned properly, some cores will be overburdened and sluggish while others idle and waste CPU cycles. Worse, improper partitioning can increase contention among cores for shared resources. To simplify implementation of these mechanisms, the Multicore Association, an industry group dedicated to addressing multi-core design issues, recently released a Multicore Communications Applications Programming Interface (MCAPI) standard. Developers following the standard will be able to use tools to automatically create communications mechanisms—for example, PolyCore Software’s Poly-Generator and Poly-Messenger/MCAPI, recently integrated into Express Logic’s ThreadX RTOS. The Poly-Generator tool allows developers to describe the characteristics and connection topology of their design’s interprocessor communications channels using XML, according to PolyCore Software’s president and CEO Sven Brehmer. The tool then generates C code and header files to create the necessary communications mechanisms that application code threads will use (see figure 1). By using the Poly-Messenger implementation of the MCAPI standard, Brehmer said, developers are freed from having to consider how the communications occur. Because the underlying communications mechanisms stem from the system XML description and are abstracted from the applications programs, changing those mechanisms to accommodate new hardware or a repartitioning of software is easier. Simply alter the XML description and recompile, without changing anything else. The MCAPI standard, and the tools that support it, can thus help reduce the trial-and-test effort developers must put into finding continued on page   EE Times-India | November 1-15, 2008 | www.eetindia.com http://www.eetindia.co.in/SEARCH/SUMMARY/technical-articles/multi~%40~core.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/SEARCH/SUMMARY/technical-articles/software%2Bpartitioning.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/SEARCH/SUMMARY/technical-articles/software%2Bpartitioning.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/SEARCH/SUMMARY/technical-articles/RTOS.HTM?ClickFromNewsletter_081101 http://forum.embeddeddesignindia.co.in/FORUM_POST_1000039251_1200092261_0.HTM?ClickFromNewsletter_081101 http://forum.embeddeddesignindia.co.in/FORUM_POST_1000039251_1200092261_0.HTM?ClickFromNewsletter_081101 http://www.eetindia.com/STATIC/REDIRECT/Newsletter_081101_EETI02.htm?ClickFromNewsletter_081101

Table of Contents for the Digital Edition of The File - Nov 1, 2008

EETimes India - November 1, 2008
Contents
National Semiconductor
Managing Threads, Communications in Multicore Partitioning
Texas Instruments
DigiKey
Improve Multi-core Hypervisor Efficiency
NECE 2008, Power India 2008, CSF: Electronics & Components, Wind India 2008, User2User 2008 India, National Conference On E-Governance

The File - Nov 1, 2008

The File - Nov 1, 2008 - Contents (Page 1)
The File - Nov 1, 2008 - National Semiconductor (Page 2)
The File - Nov 1, 2008 - National Semiconductor (Page 3)
The File - Nov 1, 2008 - Managing Threads, Communications in Multicore Partitioning (Page 4)
The File - Nov 1, 2008 - Texas Instruments (Page 5)
The File - Nov 1, 2008 - Texas Instruments (Page 6)
The File - Nov 1, 2008 - DigiKey (Page 7)
The File - Nov 1, 2008 - Improve Multi-core Hypervisor Efficiency (Page 8)
The File - Nov 1, 2008 - Improve Multi-core Hypervisor Efficiency (Page 9)
The File - Nov 1, 2008 - NECE 2008, Power India 2008, CSF: Electronics & Components, Wind India 2008, User2User 2008 India, National Conference On E-Governance (Page 10)
The File - Nov 1, 2008 - NECE 2008, Power India 2008, CSF: Electronics & Components, Wind India 2008, User2User 2008 India, National Conference On E-Governance (Page 11)
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