Aerospace and Electronic Systems - August 2018 - 29

Varizat et al.
age drifts increase more rapidly start from 150 K up to room temperature to reach a 9 mV maximum drift.
[6]

CONCLUSION
A cryogenic study of a commercial standard 0.35 μm/3.3 V bulk
CMOS technology between 77 K and 300 K has been presented.
As expected, a deviation, growing with decreasing temperature between measurements and foundry-based models simulations is observed and is being assigned to low temperature physical phenomena, like charged particle freeze-out effect. We extracted BSIM3.3
parameters to generate low temperature models of this technology.
These new models present good results on a large temperature
range from 77 K to 400 K. We used these models to successfully
design a full CMOS reference voltage with only 20 ppm/K between 100 K and 150 K.

ACKNOWLEDGEMENT

[7]

[8]

[9]

[10]

[11]

This work was supported by CNRS (Centre National de la Recherche Scientifique) and CNES (Centre National d'Etudes Spatiales)
as part as the JUICE/RPWI/SCM instrument.

[12]

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http://dx.doi.org/10.1016/j.microrel.2016.12.007 http://dx.doi.org/10.1016/j.microrel.2016.12.007 https://link.aps.org/doi/10.1103/physrevb.12.3318c https://link.aps.org/doi/10.1103/physrevb.12.3318c https://link.aps.org/doi/10.1103/PhysRev.96.28 http://link.aps.org/doi/10.1103/PhysRevLett.49.1187 http://stacks.iop.org/1674-4926/32/i=6/a=064002?key=crossref.e3cfcla8b488df63b355f9938e0294db http://stacks.iop.org/1674-4926/32/i=6/a=064002?key=crossref.e3cfcla8b488df63b355f9938e0294db http://linkinghub.elsevier.com/retrieve/pii/S0011227513000969 http://linkinghub.elsevier.com/retrieve/pii/S0011227513000969 http://digital.csic.es/handle/10261/84095 http://digital.csic.es/handle/10261/84095 http://stacks.iop.org/1742-6596/834/i=1/a=012002

Aerospace and Electronic Systems - August 2018

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