Aerospace and Electronic Systems - September 2018 - 60
Cost-Sensitive FPGA Implementation of SAR Range-Doppler Algorithm
Before the range pulse compression, the data must be transformed to frequency domain in
range. Thus, the data in Range Buffer is sent to the FFT/IFFT IP by
the mSGDMA IP. The data transformed by the FFT/IFFT IP is sent
back to the memory, by another
mSGDMA IP instance, filling the
first available column to the right
of the data buffer in use. The data
buffers (Buffer A and Buffer B) alternatively process each data block.
Buffer A process odd buffers, while
Buffer B process even buffers. Figure 9b illustrates this task.
In order to adapt the mSGDMA
IP Avalon Streaming ports to FFT/
IFFT ports, a custom hardware was
developed to perform three functions: 1) Split and merge complex
data into real and imaginary parts;
2) Convert a big Endian in to a little
Endian format; 3) Allow the software to set FFT direction (direct or
inverse) and FFT size.
At this point of the processing,
it is necessary to perform the range
pulse compression. Each term of
the data in the frequency domain in
range is multiplied by the equivalent term of the range transfer
function. The results are stored at
the same data address they were
located before the multiplication.
Figure 10a shows two representations of the memory space to illustrate data before and after the range
pulse compression.
The pulse compression in range
and azimuth employs a custom
hardware developed in VHDL,
which speeds up the task by reading
and writing the data directly to the
memory. The pulse compression
hardware transfers the data through
Figure 10.
an Avalon Memory-Mapped bus
(a) Range pulse compression. (b) Data after range processing.
from memory into registers and
calculates the pulse compression. It
then transfers the results back to memory. The custom hardware
AZIMUTH PROCESSING
bypass the Nios II processor during its operation.
After the range pulse compression, the data is transformed
The processing in azimuth has to transform data from time domain
into the time domain by the FFT/IFFT block. When all 2,048
to frequency domain, in a similar way as performed in range prorange samples sets have been processed, the data is ready for
cessing. The main difference between them lies in the way data is
azimuth processing and it is stored in the DRAM as depicted in
controlled: in range, the processed data is handled in columns; in
Figure 10b.
azimuth, the processed data is handled in rows.
60
IEEE A&E SYSTEMS MAGAZINE
SEPTEMBER 2018
Aerospace and Electronic Systems - September 2018
Table of Contents for the Digital Edition of Aerospace and Electronic Systems - September 2018
Contents
Aerospace and Electronic Systems - September 2018 - Cover1
Aerospace and Electronic Systems - September 2018 - Cover2
Aerospace and Electronic Systems - September 2018 - Contents
Aerospace and Electronic Systems - September 2018 - 2
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Aerospace and Electronic Systems - September 2018 - Cover3
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