IEEE - Aerospace and Electronic Systems - September 2019 - 41

Kobayashi et al.
Table 4.

the software signal processing backend (see Figure 12 for the block
High-Dose Rate Radiation Test Results of COTS Regulators
diagram).
The USRP is a low-cost analog-toPart number
Test results
digital sampler that has a wide RF bandwidth with sufficiently high sample
LMZ34002
Hard functional failure at 14-16 krad (biased)
rates to generate the necessary IF waveforms. The front-end electronics are
Unbiased devices show slight changes at 50 krad
simple RF mixers and analog filters to
LT1964
Output increased 20% at 26 krad, 30% at 38 krad
up-convert and down-convert the IF
Total functional failure by 50 krad
waveform to X-band. The hardware is
abstracted and paired with an open source
LT3082
No degradation/failures up thru 50 krad
software signal processing application
LT3433
Functional failures at 17-21 krad (biased)
where most of the development occurs.
Unbiased devices functional failure at 10-12 krad
This software abstraction provides a
relatively seamless transition between
LT8570
Output degraded 2% at 7 krad
simulation and hardware, providing an
LT8610/
No degradation/failures up thru 50 krad
environment for rapid development.
LT8613
A typical development approach starts
by exercising the theory numerically,
converting it to simulation software, and
ultimately integrating drivers for the USRP to execute. New
However, the TCXO bias circuitry needs 13.5 V, which
tests and modifications can be created and implemented
is in between the input bus voltage range. Given the
expeditiously. This fits well with the "more for less" philosbuck/boost LT3433 and the boost/SEPIC/inverting
ophy that CubeSat missions typically subscribe to. Another
LT8570 devices failed radiation testing (see Table 4), a
advantage of this SDR platform is the provided standard procustom flyback converter using a rad-hard Intersil
tocol interface. Various projects using the Cassy have found
ISL78845 pulsewidth modulator chip was designed.
this interface convenient because it allows them to easily
The final design utilizes the custom flyback converter,
integrate their ground data system into the test campaign for
along with LT8610, LT8613, and LT3082 COTS conenhanced flight-like tests.
verters as shown in Figure 11.
A drawback of this software-processing approach is
that at high rates (> 64 kbps), real-time software processing can be taxing on the host machine due to the
GROUND SUPPORT EQUIPMENT DESIGN
large number of raw IQ samples to be processed. There
are several options to address this drawback. Two nonThe communications assembly ground support equipintrusive methods include recording raw IQ data for
ment (Cassy GSE) is a custom-designed RF uplink/
subsequent postprocessing, as well as implementing
downlink test unit to provide DSN-like functionality in
more efficient algorithms. Cassy development has relied
an inexpensive unit for ease of development and use.
on these methods to run higher bandwidth test cases
It does so by taking advantage of a readily available
against the Iris. Other, more intrusive options require
commercial SDR platform (Universal Software Radio
hardware upgrades such as incorporating preprocessing
Peripheral; USRP) and various microwave components.
FPGAs and dedicate high-speed processors with highThe Cassy GSE comprises three main components: the
speed data interfaces such as 10 Gigabit Ethernet, etc.
X-band front-end electronics, the digital sampler, and
Because the higher rates tests demand more resources

Figure 11.

Figure 12.

Power supply board assembly (left: top side, right: bottom side).

Cassy simplified block diagram.

SEPTEMBER 2019

IEEE A&E SYSTEMS MAGAZINE

IEEE - Aerospace and Electronic Systems - September 2019

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