IEEE Awards Booklet - 2020 - 2

MEDAL OF HONOR

"It was 1968," Hu recalls, "and he told us semiconductors were
going to be the material for future televisions, and the televisions
would be like photographs we could hang on the wall."
That, in an era of bulky tube televisions, got Hu's attention. He
decided that semiconductors would be the field for him and applied to graduate programs in the United States. In 1969, he landed
at Berkeley, where he joined a research group working on metaloxide semiconductor (MOS) transistors.
His career soon took a detour because semiconductors, he recalls, just seemed too easy. He switched to researching optical circuits, did his Ph.D. thesis on integrated optics, and went off to MIT
to continue his work in that field.
But then came the 1973 oil embargo. "I felt I had to do something," he said,"something that was useful, important; that wasn't just
writing papers."
So he switched his efforts toward developing low-cost solar cells
for terrestrial applications-at
the time, solar cells were used
only on satellites. In 1976, he
returned to Berkeley, this time
as a professor, planning to do
research in energy topics, including hybrid cars, an area
that transported him back
to semiconductors. "Electric
cars," Hu explains, "needed
high voltage, high current
semiconductor devices."
Come the early 1980s, that
move back to semiconductor research turned out to be
a good thing. Government
funding for energy research
dried up, but a host of San
Francisco Bay Area companies
were supporting semiconductor research, and transitioning
to corporate funding "was not
very difficult," Hu says. He started spending time down in Silicon
Valley, not far from Berkeley, invited by companies to teach short
courses on semiconductor devices. And in 1982, he spent a sabbatical in the heart of Silicon Valley, at National Semiconductor in
Santa Clara.
"Being in industry then ended up having a long influence on
me," Hu says. "In academia, we learn from each other about what
is important, so what I thought was interesting really came just
because I was reading another paper and felt, 'Hey, I can do better
than that.' But once I opened my eyes to industry, I found that's
where the interesting problems are." And that epiphany got Hu
looking harder at the 3D structure of transistors.
A field-effect transistor has four basic parts-a source, a drain, a conductive channel that connects the two, and a gate to control the flow
of current down the channel.As these components were made smaller,
people started noticing that the behaviors of transistors were changing
with long-term use.These changes weren't showing up in short-term
testing, and companies had difficulty predicting the changes.
In 1983, Hu read a paper published by researchers at IBM that
described this challenge. Having spent time at National Semiconductor, he realized the kinds of problems this lack of long-term
reliability could cause for the industry. Had he not worked in the

trenches, he says, "I wouldn't have known just how important a
problem it was, and so I wouldn't have been willing to spend nearly
10 years working on it."
Hu decided to take on the challenge, and with a group of students
he developed what he called the hot-carrier-injection theory for
predicting the reliability of MOS semiconductors. It's a quantitative
model for how a device degrades as electrons migrate through it. He
then turned to investigating another reliability problem: the ways in
which oxides break down over time, a rising concern as manufacturers made the oxide layers of semiconductors thinner and thinner.
These research efforts, Hu says, required him to develop a deep
understanding of what happens inside transistors, work that evolved
into what came to be called the Berkeley Reliability Tool (BERT)
and BSIM, a set of transistor models. BSIM became an industry
standard and remains in use today; Hu still leads the effort to regularly update its models.
Hu continued to work with his students to study the basic characteristics of transistors-how they work, how they fail, and how
they change over time-well into the 1990s. Meanwhile, commercial chips continued to evolve along the path predicted by Moore's
Law. But by the mid-1990s, with the average feature size around
350 nm, the prospects for being able to shrink transistors further
had started looking worrisome.
"The end of Moore's Law was in view," recalls Lewis Terman,
who was at IBM Research at the time.
The main problem was power. As features grew smaller, current
that leaked through when a transistor was in its "off " state became
a bigger issue. This leakage is so great that it increased-or even
dominated-a chip's power consumption.
"Papers started projecting that Moore's Law for CMOS would
come to an end below 100 nm, because at some point you would
dissipate more watts per square centimeter than a rocket nozzle,"
Hu recalled. "And the industry declared it a losing battle."
Not ready to give up on Moore's Law, DARPA (the Defense
Advanced Research Projects Agency) looked to fund research that
promised to break that barrier, launching an effort in mid-1995 to
develop what it called the 25-nm Switch.
"I liked the idea of 25 nm-that it was far enough beyond what
the industry thought possible," Hu says.
Hu saw the fundamental problem as quite clear-making the
channel very thin to prevent electrons from sneaking past the gate.
To date, solutions had involved thinning the gate's oxide layer.That
gave the gate better control over the channel, reducing leakage current. But Hu's work in reliability had shown him that this approach
was close to a limit: Make the oxide layer sufficiently thin and electrons could jump across it into the silicon substrate, forming yet
another source of leakage.
Two other approaches immediately came to mind. One involved
making it harder for the charges to sneak around the gate by adding a layer of insulation buried in the silicon beneath the transistor.
That design came to be called fully depleted silicon-on-insulator,
or FDSOI.The other involved giving the gate greater control over
the flow of the charge by extending the thin channel vertically
above the substrate, like a shark's fin, so that the gate could wrap
around the channel on three sides instead of just sitting on top.This
structure was dubbed the FinFET, which had the additional advantage that using space vertically relieved some of the congestion on
the 2D plane, ushering in the era of 3D transistors.
There wasn't a lot of time to get a proposal submitted to DARPA, however. Hu had heard about the DARPA funding from a

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IEEE Awards Booklet - 2020

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