James Webb Telescope Issue - 32

Graduate Research SP
TLIGHT
Ahmed Abugroun
Gamma Theta
Missouri University of Science and Technology, Ph.D. Student in Electrical Engineering
RESEARCH TOPIC
Deep Neural Networks for Real-Time Navigation and Control
A mobile robot can be made autonomous using a real-time camera for detecting and avoiding objects that are located in its
environment. Deep learning is a subfield of machine learning using artificial neural networks (ANN) to process image data similar
to how our human brain processes vision information. Ahmed's smart robotics research uses a special type of ANN known as
convolutional neural network (CNN) to generate a model of the environment by
processing image data in real-time. To create the ANN-based model, a deep lifelong
learning scheme that is effective with different background environments is needed.
Ahmed developed a new lifelong learning scheme to mitigate 1) the catastrophic
forgetting problem- which occurs when a CNN uses image information that
is obtained from different backgrounds, and 2) vanishing gradient problemcommonly
found with stochastic gradient descent (SGD)-based learning techniques
that are normally employed to tune the weights of these ANN. Instead, his novel
deep NN learning scheme adjusts the weights of the CNN layers directly in an
offline supervised training mode first when limited image data sets are available and
subsequently in real-time while navigating and collecting images. Driving simulator
results for steering angle prediction at different robot speeds show that his approach
performs better over widely employed SGD methods.
Fig. 1. The deep neural network that uses real-time data
to obtain better autonomous driving
Fig. 2. A block diagram illustrating the training system
of the robot.
LEARN MORE
https://works.bepress.com/jagannathan-sarangapani/
CONTACT
aha4mb@mst.edu
Geraldine Shirley Nicholas
Kappa Phi Chapter
University of North Carolina at Charlotte, Ph.D. Student in Electrical Engineering
RESEARCH TOPIC
A Secured SoC Platform For Security Assessments In FPGA Using RISC-V
With the rapid increase in connected devices and SoC design architecture being used in
diverse platforms, they've become potential targets to gain unauthorized access for data
and privacy invasion. Security measures to protect the interfaces and data propagation
through different channels are critical, and building a resilient model consists of the onchip
security factors. RISC-V architecture is used to build a robust side-channel analysis
framework, as it provides a platform for custom implementation of security extensions
when compared to other traditional architectures with the benefits of being an opensource
ISA.
Considering a real-time network in which critical data is transferred from one node
to another an adversary can modify the return address and corrupt the memory by
gaining access to the system via untrusted channels and data. Tracking the data and
the return addresses using the IFT model by a tagged mechanism for instruction level
and shadowed logic for gate level mitigates all types of data related software attacks
leveraging the RISC-V architecture benefits. An automated gate level model design
tracks the information flow of specific security critical modules to detect leakage of data
and triggering functionality that affects the output. The proposed IFT model is precise in
securing the keys and other sensitive data. Flexibility in applying the logic to any datapath
yields minimal overhead compared to other traditional models.
LEARN MORE
https://coefs.charlotte.edu/fsaqib/projects/
Proposed security extensions for RISC-V
Information Flow Tracking
Model
HEAD Research Lab
CONTACT
https://www.linkedin.com/in/geraldine-shirley-90b41266
THE BRIDGE

https://works.bepress.com/jagannathan-sarangapani/ https://coefs.charlotte.edu/fsaqib/projects/ https://www.linkedin.com/in/geraldine-shirley-90b41266

James Webb Telescope Issue

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