IEEE Circuits and Systems Magazine - Q1 2018 - 19
denser gray areas) when the target min ^d p, d s h = 0.001.
The hardware complexities (in terms of FA + FF) of a
number of published filter design methods [46]-[56]
are summarized in Fig. 9. These methods include the
optimized transposed direct-form implementations of
the original filter in [56] whose coefficients were identified using an LMS-based method, the FIRGAM method
[53], the PMILP algorithm [53]-[55], the minimum adder
MILP [49], [50], the two-stage cascade method [51], the
factored cascade design [46], [47], [57], [58], and both
the fully-pipelined and non-pipelined versions of the
Fig. 8 factored interpolated cascade structure.
Notice again the proximity of the hardware complexity of the factored structure (Fig. 8) to the bound in
Fig. 9. Hence we would like to raise the following important
presented in [58] based on the optimal factoring techniques
[46], [47], [57], [58].
Each stage in the factored Fig. 8 cascade is followed
by a power-of-two scaling and a truncation (or rounding) to efficiently manage the wordlength of the datapath [46]. Given that in this example a 60-dB stopband
attenuation is desired (similar to Example 1), the input
signal should have at least a 12-bit wordlength (including the sign bit). As illustrated in Fig. 9, the bound in
(11) using a = 1 (blue solid line, min ^d p, d s h = 0.001) predicts that a practical implementation of this order-62
FIR filter requires a minimum of approximately 1580 flipflops and full adders. The gray area in Fig. 9 indicates
the region that is predicted to be practically unreachable or quite unlikely to be realized (especially for the
1/4
1+z-3+z-6
1/4
1/2
1+1.25z-1+z-2
1/4
1+0.125z-3+z-6
1/2
1/2
1+0.75z-3+z-6
1-4z-1+z-2
1/2
1+1.5z-3+z-6
1/2
1-0.46875z-3+z-6
1-0.25z-3+z-6
1+0.75z-1+z-2
4
1-4.65625z-3+7.5z-6-4.65625z-9+z-12
-1/2
1/4
1+2z-3+z-6
1/2
1/4
1+1.75z-3+z-6
1+0.25z-1+z-2
1/2
1.1100010111
1/4
1+z-1
1+2z-1+z-2
(a)
0
0.1
Magnitude (dB)
(dB)
-20
-40
0
-0.1
Target δp = ±0.1035 dB
Target ωp = 0.042 rad/π
0
0.01
0.5
ω/π
0.6
-60
0.02
0.03
ω/π
0.04
-80
-100
-120
Target δs = -60 dB
Target ωs = 0.14 rad/π
-140
0
0.1
0.2
0.3
0.4
0.7
0.8
0.9
1
Conventional Equiripple
Optimally Factored Cascade
(b)
Figure 6. An optimally-factored implementation [46], [47], [57], [58] of the filter specification in Example 1 and the corresponding
magnitude plot. Each stage in the optimally-factored cascade is followed by a power-of-two scaling and a truncation (or rounding)
to efficiently manage the wordlength of the datapath [46].
fIrst quArtEr 2018
IEEE cIrcuIts ANd systEMs MAgAzINE
19
Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q1 2018
Contents
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