IEEE Circuits and Systems Magazine - Q2 2018 - 59
(26)
in which the expression for c (v m) is
v 2m a exp (b v m )
vp
o,
(27)
with a (v m) expressed by
T
a (v m) = B sinh `
vm .
j
v on
(28)
Inserting the analytical expression for the state from
equation (22) into the memductance function G (x, v m)
from equation (21), the formula for the time evolution of
the device memductance is found to be given by
G (Vm) = a exp ^b Vm h + ^G m - a exp ^b Vm hh
# c 1 b 1 (Vm) + 1 erfi -1 c 2 h (Vm) (t - t 0)
a
a
1
1
+ erfi ^a 1 x 0 - b 1 (Vm) hmm .
r
(29)
Inserting this formula into the Ohm-based law in
equation (21) provides the closed-form expression
describing the time evolution of the memristor current
in response to a generic positive DC input voltage Vm
for any initial condition. The availability of formulae
of the kind shown in equations (22) and (30) may support the work of circuit designers, which typically use
known analytical results to narrow the search for circuit topologies with a potential to meet given specifications. With reference to Fig. 12(b), taking the model
parameters reported in Table I and applying a constant
positive DC voltage Vm equal to 0.5 V across a memristor nano-device with initial conditions within the
set x 0 ! " 0, 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7 ,, the use of the
closed-form expression for the memory state from equation (22) results in the blue time waveforms, matching
very accurately the state solutions obtained by numerical integration of the DAE set (20)-(21), and illustrated
as red curves. These results provide insights into the
device on-switching kinetics. For a device initiated in a
high resistance state, corresponding to an initial condition close to the lower bound, the state rate of change
for Vm = 0.5 V -see Fig. 11(a)-is rather low, and thus
the memory state experiences a negligible increase for
a significant amount of time-which is longer the more
resistive is the device initially-before undergoing a very
sharp transition upwards, capturing the acceleration of
the on-switching process of the nano-device due to thermally-activated positive feedback effects. Following the
sEcOnd quartEr 2018
5
2.5
erfi-1
T
c (v m) = a (v m) exp e b 21 (v m) +
abrupt increase, the memory state is subject to a significant slow-down induced by the considerable decrease the
state rate of change experiences after the memory state
goes over the maximum of the xo -x loci for Vm = 0.5 V -
see Fig. 11(a)-approaching the state solutions corresponding to higher initial conditions as time goes on.
At the end of the simulation all state solutions follow
a common path leading inevitably towards the upper
unitary bound. The asymptotic saturating behaviour of
the memory state is mathematically captured by the
compressing operation the imaginary error function
performs upon its argument, as clear from inspection
of Fig. 12(a). Importantly, using any other positive value for Vm, the state solutions departing from different
initial conditions ultimately follow the same trajectory
heading towards the upper limit [33]. Similar conclusions apply under any negative DC voltage stimulation
of the device, leading to a progressive merging of state
solutions initiated from distinct initial conditions, and
to their unique asymptotic convergence to the lower
null bound, as described thoroughly in [33] and shown
0
-2.5
-5
-1
0.8
x
T
h (v m) = a 1 c (v m),
-0.5
0
ρ
(a)
0.5
1
× 109
x0 = 0.7
x0 = 0.6
0.6
x0 = 0.5
x0 = 0.4
0.4
0.2
x0 = 0.3
x0 = 0.2
0
10-10
Theory
Simulation
x0 = 0
x0 = 0.1
100
1010
1020
t /s
(b)
Figure 12. (a) Plot of erfi -1 (t) versus t. (b) response of the
memory state to the application of a positive dc voltage Vm
of value 0.5 V across the tantalum oxide nano-device for
a set of 8 distinct initial conditions. Blue (red) curves: state
solutions from the closed-form expression in equation (22)
(numerical simulations of the daE set (20)-(21)).
IEEE cIrcuIts and systEms magazInE
59
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