IEEE Circuits and Systems Magazine - Q2 2018 - 88

A wider view of the concept or manycore should include the idea
of mixing different kinds of resources and processors,
forming heterogeneous manycore systems.
(DC) data were collected from [38]. For each approach
misclassification rates, energy/classification, time/classification, and an accuracy × energy × delay benchmark
(lower numbers are desirable) are reported. When compared to existing approaches, the CNN-based approach
is on par with other approaches (i.e., in AED) and might
be a better alternative in applications where energy/classification is a key factor (such as mobile applications).
In a broader sense many core computers are the current approach to the solution of computationally intensive problems. At the present day, manycore means up
to 1000 but soon few 100,000 or even more processing elements will be available on a desktop machine. A wider
view of the concept or manycore should include the idea
of mixing different kinds of resources and processors,
such as logic processors (Configurable logic blocks),
arithmetic processors (DSP blocks) and general purpose processor (e.g. Microblaze) are in the same FPGA
chip or computing together, forming heterogeneous
manycore systems. New ideas and new methods are required in algorithm development for these types of architectures. Using the cellular architecture of processor
and memories new kind of parallel algorithms have to
be developed. For the same Physical multi-cellular machine architecture different Virtual Machines can be defined, the latter is serving for algorithmic and software
development. However, all virtual machines are to be
uniquely mapped to a specific Physical Machine (a chip
or chip set, etc.). Hence all computing element has a
geometrical position on the Physical Machine and a geometric or topographic address on the Virtual Machine.
In this new scenario of computer science and computer
engineering computational complexity, computing power is a multi-parameter vector, any algorithm solving a
problem will have a speed-power-area-bandwidth- accuTable I.
This table summarizes misclassification rate (Miscl.),
Energy consumption, Time and accuracy × energy
× delay (AED) measurements of three different
approaches on the MNIST dataset.

Approach

Miscl.
(%)

Energy
(µJ)

Time
(µs)

AED

CNN

1.77

634

5610

TrueNorth

1000

25000

Intel+NVIDIA

0.21

1082

7.3

1658

IEEE CIrCuItS aND SyStEmS magazINE

racy metric. These parameters and this metric should
be handled simultaneously and optimized [43]-[45].
IX. Conclusions
The brief history of the CNN research, the main theoretical and practical results, and the future trends were
summarized in this overview paper.
Acknowledgement
The CNN technology development was supported by
ONR, NSF, MDA, European, Spanish, German, Italian,
and Hungarian research funds
Dr Ákos Zarándy spent 15 years with
the scientific research and development
of various cellular array processor architectures, implementations, and applications. He led several successful
research and development projects, including vision system development, locally adaptive
sensor development, and solved ultra high-speed vision
problems. Dr Zarándy had introduced and patented an
image processor system architecture, and took part in
the development of a patented vision chip. He is currently Science Advisor at the Institute for Computer Science
and Control, and professor at the Pazmany Peter Catholic University.
Dr. András Horváth received his PhD
from Pázmány Péter Catholic University
in 2012 and currently works as an assistant professor at the Faculty of Information Technology, at Pázmány Péter
Catholic University. His research interest includes Cellular Neural Networks, computer vision
and machine learning, especially supervised learning
algorithms in deep learning and the optimization of
these algorithms to low-power architectures.
Dr Péter Szolgay, professor and head of
doctoral school in the Faculty of Information Technology and Bionics, at the
Pázmány Péter Catholic University Budapest. His research interests are parallel
computing architectures, kilo-processor array computing, Cellular Neural Networks, sensory computations.
SECOND quartEr 2018

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