One key aspect of visual microprocessors is the integration of sensing and stored programmable processing at the analog signal array level. other things, this allows us to tune the sensors dynamically, pixel by pixel, depending on the content and even on the context of the changing scene. CNNUM-based visual microprocessors belong to the general class of topographic smart sensors processors formed by an array of processing cores. Some features which make CNNUM different from other topographic processors include the following: ■ Their elementary processors (cells) are intrinsically mixed-signal processors which mutually interact with tunable interaction weight patterns. ■ Data memories are embedded per-pixel to locally store partial processing outcomes that are further employed to either generate global processing outcomes or control the sequence of processing steps. ■ This programmable and reconfigurable array is embedded in a computer architecture resulting in CNNUM general-purpose architecture. ■ The CNNUM is programmable and capable of im plementing mixed-signal spatial/temporal algorithms through the smart synergy of hardware and software. CIS Front-End F Digital Processor Low-Level Tasks ADC F f F Mid-Level Tasks f High-Level Tasks Data Dimensions: F >> f > f Array of Photosensors (a) CVIS Front-End F Digital Processor Mid-Level Tasks ADC f High-Level Tasks f f Data Dimensions: F >> f > f F f f Processing Chain (b) Figure 4. conceptual vision system architectures with: (a) a cIs front-end; (b) a cVIs front-end. cVIss perform early vision tasks right at the front-end, thereby bringing much less number of data into play and hence significantly reducing memory, bandwidth and computation payloads [19]. 96 IEEE cIrcuIts and systEms magazInE sEcOnd quartEr 2018