IEEE Circuits and Systems Magazine - Q3 2018 - 22

fast features of the PPG signal. Increasing the pulse repetition rate of the LED current results in better signal accuracy but at higher energy consumption. The LED current pulse repetition rate and pulse width are a trade-off
between signal quality and the total consumed energy.

RED On
220 µs

RED Off
1,780 µs

RED LED
(660 nm)

Figure 27. Pulse train to control the LED driver.

L
+
-

Vout
Iout

VDD

Iout LED Current

PDM
t (s)

Figure 28. LED driver based on pulse density modulation
(PDM) [90].

VDD
10Ibias

Ibias
10 W/L

2Ibias 8Ibias
VTOP
CSb
2 W/L
VCASV

0.25 W/L
10 W/L

VBOT

ILED
NW/L
Current
DAC
NW/L

CD
CSb

Figure 29. The wide-swing cascode LED driver DAC [74].

Typical systems sample with rates between 100 Hz and
1000 Hz with a pulse width ranging from 10 n s up to 100 n s.
A study was introduced in [89] to select the optimum
LED duty cycle to reduce the power consumption for a
certain SNR.
A LED driver is proposed in [90] with 89% efficiency. A
low supply voltage and low average current are desired
for devices such as a PPG heart rate monitor, as shown
in Fig. 28. The LED current and as a result the transmitted optical power is controlled by pulse density modulation (PDM). The integrated digital blocks for varying
the LED optical power help to reduce the chip area. The
LED driver implemented in 180 nm CMOS along with an
external inductor has a controllable current range from
28 n A up to 1.3 mA using a 0.5 to 0.6 V supply voltage.
The LED driver was designed as 8-bit, wide-swing
cascode current mirrors, as shown in Fig. 29 [74]. This
topology was chosen to maintain the high linearity of
the output current across a large variation of the cascode drain voltage. Voltage variation occurs because
the forward LED voltage can be as small as 1.1 V for an IR
LED and as large as 1.8 V for a red LED. Additionally, for
operation with a small coin-cell battery, the voltage can
be as high as 3 V when the battery is fully charged and
as low as 2.3 V when the battery discharges. The LSB of
the LED driver DAC is 100 n V with a maximum current
of 25.6 mA. To reduce the voltage drop along the high
current path, the DAC is toggled by switches connecting the gates of the cascode transistors to either VTOP
and or VBOT to ground (not shown). A digitally controlled
fast startup current reference for duty cycling the LED
driver bias is also utilized to conserve the power. The
duty cycle is 0.7%, which corresponds to a square LED
current pulse that is 40 n s wide every 60 ms.
F. PPG Integrated Sensor
A wearable cNIPB requires both low power and light
weight/small area. The integration of the PPG receiver
and the LED driver reduces the number of off-chip elements to obtain a compact portable system. Table IV

Table IV.
Recently published integrated PPG sensors.

Process

Biasing

Noise

Rejection

Integrated LED Driver

[84]

0.35 μm

2.5 V/58 μA

40.8 nA

15 μA, 165 pF on chip

[73]

0.35 μm

2.5 V/240 μA

3.53 nA

43.9 μA, 2.2 nF Off chip

[71]

180 nm

0.5 V/8 μA

4 nA

3.5 μA logarithmic DRC

[74]

180 nm

2.3 V/425 μW

2.5 nA

100 μA, DRE current source

LSB 100 μA maximum current
of 25.6 mA

[70]

0.35 μm

3.3 V/1.88 mW

445 μV

1.3 mW, Feedback path to
control the LED current

IEEE CIrCUITs AND sYsTEMs MAGAzINE

ThIrD qUArTEr 2018

Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q3 2018