IEEE Circuits and Systems Magazine - Q3 2018 - 37

due to the doubled harvesting rate (four times in a period compared to two times in a period for all of the previous SSHI interfaces [69]). The switch control is similar to that in the MR-SSHI technique since S 1 is closed
when the output voltage on the piezoelectric transducer
is at its maximum and the switch S 2 is closed when the
transducer voltage is at its minimum. The diode D is
used to ensure a correct current flow from the piezoelectric source to the storage capacitor.
When the maximal voltage amplitude across the
piezoelectric transducer is lower than the rectified voltage, only the SSHI-MR interface is operating, leading to
the waveforms depicted in Fig. 14. Conversely, when both
P-SSHI and MR-SSHI are operating, the attained waveforms
resemble the ones characteristic of the P-SSHI technique.
P-SSHI operation is mainly effective for middle values
of the connected load while, the MR-SSHI rectification
technique is mostly effective for high load values, as
demonstrated in [82].

has a lower sensitivity to a mismatch in the capacitance
ratio ^C int /C p h with respect to the DSSH technique [85].
Adaptive Synchronized Switch Harvesting (ASSH)
is an optimization of the ESSH technique particularly designed for multi-mode vibrations. In ESSH, the
switch S 1 closes when the piezoelectric mechanical
structure is at its maximum displacement u M twice in
a period. It has been proven that, in the case of single
frequency excitation, the control law of ESSH is optimal [85]. Instead, in the ASSH control technique, Fig. 16,
the switch S 1 is closed at least four times in a period.
An adjustable threshold coefficient b is used to control the switch S 1 .

Vpiezo
Vdc
Ip

E. DSSH, ESSH and ASSH
Double Synchronized Switch Harvesting (DSSH) is a rectifier derived form the S-SSHI and SECE techniques, and
like SECE the harvested power is almost independent of
the connected load. The switches S 1 , S 2 and the diode
D are used to control the energy flow.
With the switch S 1 closed and the switch S 2 open,
the energy is transferred from the piezoelectric element
to the inductor L 1 and the intermediate capacitor C int .
After that, opening the switch S 1 and closing S 2 , the
energy is transferred from C int to the inductor L 2 . In the
last phase the energy stored in L 2 is transferred on the
storage capacitor C store and to the load [84]. One advantage of DSSH over SECE is that, by finely tuning the value of the ratio between the piezoelectric capacitor and
intermediate capacitor, the trade-off between damping
effects and harvested energy can be controlled.
The same circuit topology can be used to implement
the Enhanced Synchronized Switch Harvesting (ESSH)
technique. The difference between ESSH and DSSH is
that, by using ESSH, the intermediate capacitor C int always stores a small amount of energy. The switch S 1 is
almost always open, but it closes for a brief period of
time when the modulus of the voltage generated by the
piezoelectric element reaches its maximum, charging
the intermediate capacitor C int .
The switch S 2 periodically removes part of the
charge stored in C int . When the voltage drop across
C int exceeds a pre-set value V H , the switch S 2 is closed
charging the inductor L 2 . When the voltage drop across
C int is below the pre-set value V L, the switch S 2 opens
and the energy stored in L 2 is transferred to the storage capacitor and the output load. The ESSH technique
THIRD quaRTeR 2018

Rp
S1

S2
Vdc

Vdc
u

VS1

Cstore

Vpiezo
u
VS2
VS1

Vpiezo
VS2
t

MR-SSHI and P-SSHI
Operation Mode

MR-SSHI
Operation Mode

Figure 14. circuit diagram of the hybrid synchronized switch
harvesting on inductor rectifier and relative waveforms.

Vpiezo
Ip Cp

L1
Rp

VCint
Cint
S2

L2
D

Cstore
Vdc

Vdc
Vpiezo
u

VCint DSSH VCint ESSH
t

Figure 15. circuit diagram of double synchronized switch
harvesting, enhanced synchronized switch harvesting and
adaptive synchronized switch harvesting rectifiers with simplified waveforms.

Ieee cIRcuITs anD sysTems magazIne

Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q3 2018