IEEE Circuits and Systems Magazine - Q2 2019 - 50

power consumption is a concave function of array size
except few exceptions that will be discussed in later
paragraphs. The concavity comes from the trade-off
between PA power and processing power in other circuits blocks for different antenna array sizes. In the figures, the range of antenna element number N for all
scenarios is chosen to be close to green point, one that
minimizes system power consumption.
Taking a closer look at Dense Urban MBB use case
in Figure 9, we have the following conclusions. Firstly,

DA and FH have similar green point of array size when
the same number of streams U is used, while green
point of SA is much larger. This is due to the inefficiency of array gain (5) when SA splits antenna with
sub-groups. The exception occurs in SA with U = 32
streams. When SA uses small antenna number and high
multiplexing level, it effectively becomes a digital array. In fact, the green point for SA with U = 32 streams
occurs at N = 32. It requires RF-chain to be connected
to one antenna which makes SA a fully digital array.

DA Processing IC
LO/Buffer
To PA

DAC
DAC

SerDes

DAC/
LPF

Circuits Block

PreDriver

Mixer

Port/
T-Line

Gain/IL (dB)

-

-

13

-2

Output (dBm)

-14

-6

7

5

OP1dB (Bm)

-

-

17

-

(a)
SA Processing IC
LO/Buffer

Splitter and IL
Compensation

0 dBm
DAC
D/A

SerDes

Circuits Block

To PA

1:4

1:4

DAC/
Wilk.+ RF Wilk.+
Mixers
LPF
T-Line Amp. T-Line

VM

Pre- T-Line/
Driver Port

Gain/IL (dB)

-

-

-(8+2)

10

-(8+2)

2

21

-2

Output (dBm)

-14

-6

-16

-6

-16

-14

7

5

OP1dB (dBm)

-

-

-

4

-

-4

17

-

(b)
FH Processing IC
LO/Buffer
SerDes

Circuits Block

FH Combining IC With
Multi-Stage IL Compensation

Multi-Stage IL Compensation
1:4

DAC
DAC

1:4

1:4

Wilk.
Wilk.
Wilk.
DAC/
RF
RF
IQ
and
and
and
LPF Mixer T-Line Amp. T-Line Amp. T-Line

2:1

PS

To PA

4:1

Wilk.
Port/
RF
RF
Port/ Wilk.
and
and
T-Line T-Line Amp. T-Line Amp. T-Line

Gain/IL (dB)

-

-

-(8+4)

12

-(8+3)

12

-(8+2)

2

-3

-(8+2)

12

-(8+2)

31

-2

Output (dBm)

-14

-6

-18

-6

-17

-5

-15

-13

-16

-26

-14

-14

7

5

OP1dB (dBm)

-

-

-

4

-

5

-

-3

-

-

-4

-

17

-

(c)
Figure 8. the signal distribution budget example of three array architectures. (a) Distribution Budget in DA Architecture,
(b) Distribution Budget in sA Architecture, (c) Distribution Budget in Fh Architecture.
50

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IEEE Circuits and Systems Magazine - Q2 2019

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