IEEE Circuits and Systems Magazine - Q1 2020 - 18

where A InvCas and R out are the open loop gain and the
open loop output resistance respectively described by:
R out = c g mn2 + 1 + 1 m ron1 ron2
ron1 ron2
// c g mp2 + 1 + 1 m rop1 rop2
rop1 rop2

(16)

A InvCas = -G m R out = -(g mn1 + g mp1) R out

(17)

The zero frequency input resistance can be easily
computed using the feedback theory and it is:
Z (0) in = R out + R F
; A InvCas ; + 1

(18)

Assuming that C PD is very large compared to C out, the
BW can be approximated by:

Table III.
Simulation parameters of the INVCAS-TIA.
Case

WMn1

WMn2

WMp1

WMp2

RF

5 KHz,
Minimum Noise

13
μm

7
μm

8.1
μm

5
μm

16
MΩ

5 KHz, Minimum
Power

0.6
μm

3.5
μm

0.55
μm

2.5
μm

16.8
MΩ

100 MHz,
Minimum Noise

13
μm

28
μm

22
μm

15
μm

61
KΩ

100 MHz,
Minimum Power

2.5
μm

5
μm

4
μm

2.6
μm

8
KΩ

VDD
VDD

Mp1

Mp3

Mp2

Amp1
R1

VDD

RF
VDD
R2

Mn2

Amp2
Mn3
Mn1
IPD

CPD

Figure 7. Schematic diagram of the RIC-TIA.
18

IEEE CIRCUITS AND SYSTEMS MAGAZINE

Cout

BW -

; A InvCas ; + 1
1
=
2rZ (0) in C PD 2r (R out + R F ) C PD

(19)

It is clear from equation (17) that the open loop gain
has been greatly increased compared to the open loop
gain of the Inv-TIA described in equation (9). Consequently, a higher BW and a higher GBW are obtained
as illustrated by equation (19) compared to the Inv-TIA.
Nevertheless, the InvCas-TIA has less voltage headroom per transistor which reduces the dynamic range
and deteriorate the linearity compared to the Inv-TIA.
Those observations are confirmed by the later simulation results.
The input noise current of the InvCas-TIA is given by:
I n2, in = 4K B T =

2
Gm
+ (2rf C PD)2
RF
(1 - G m R F ) 2
1 + (2rf C PD R F )2
+
(g mn1 c n + g mp1 c p)
(1 - G m R F ) 2
1 + (2rf C PD R F ) 2
g mn2 c n
+
1 r 2
c (1 - G m R F ) c g mn2 +
m on1 m
ron2
1 + (2rf C PD R F )2
g mp2 c p
+
H
1 r 2
c (1 - G m R F ) c g mp2 +
m op1 m
rop2

(20)

Equation (20) is consisted of four terms, the first term
describes the input noise contribution due to R F , the
second term is the input referred noise due to M n1 and
M p1 . The third and fourth terms are the contribution of
M n2 and M p2 respectively.
It can be deduced that the noise contribution of R F
dominates at low frequencies while the cascode transistors dominate at higher frequencies. Furthermore, due
to the extra two noise term of the cascode transistor
in equation (20), the noise performance is degraded at
high operating frequencies compared to the Inv-TIA.
However, because of the higher transimpedance gain of
the InvCas-TIA that is obtained at the same BW (higher
R F ), the low frequency input noise is reduced compared
to the Inv-TIA. This makes the topology very appealing
for the high sensitivity biomedical applications. The value of transistor widths and resistances that are used for
this study are listed in table III.
D. Regulated Inverter based
Cascode TIA (RIC-TIA)
The schematic diagram of the RIC-TIA is shown in Fig. 7.
The advantage of the RIC-TIA compared to the InvCasTIA is the regulation of M n2 and M p2 . Accordingly, the
transconductance of M p2 and M n2 are multiplied by
the gains of Amp.1 and Amp.2 respectively as shown
in the following mathematical model. Also, biasing the
cascode transistors is achieved without the need of
FIRST QUARTER 2020
IEEE Circuits and Systems Magazine - Q1 2020

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