IEEE Circuits and Systems Magazine - Q1 2020 - 20

E. Common Gate TIA (CG-TIA)
The circuit of the CG-TIA is shown in Fig. 8. The CG-TIA
is used due to its relatively low power consumption and
low input impedance [55]-[57]. The input photocurrent is fed to the source of the common gate transistor
M n and the output is taken from its drain. The CG-TIA
provides a low input impedance - g -mn1 which serves to
achieve a relatively high BW. The transimpedance gain
of the CG-TIA is described by:
Z (S ) TIA =

( g mn ron + 1) R D
(28a)
(SC out R D + 1) (SC PD (R D + ron) + g mn ron + 1)

Z (0) TIA = R D

(28b)

VDD

Z (0) in =

R D + ron
- 1
g mn
g mn ron + 1

(29)

Assuming that the dominant pole is resulted from
C PD and Z (0) in, thus, the BW is described by:
BW =

g mn ron + 1
g mn
2rC PD (R D + ron) 2rC PD

(30)

Consequently, obtaining large BW means increasing the
transconductance g mn and hence the DC current consumption of M n . Accordingly, equation (30) shows a tradeoff between the BW and the power consumption for the CG-TIA.
The input referred noise current of the CG-TIA is presented by:
I 2n, in = 4K B T =

(2rf C in ron) 2 + (g mn ron) 2 + 1
RD
(1 + g mn ron) 2
(2rf C in ron) 2
g mn c n + g mnB c nG
+
(1 + g m ron) 2

RD

Mn

VB

where g mn is the transconductance of M n . The zero frequency input resistance is given by:

IPD CPD

Cout

IB

Figure 8. Schematic diagram of the CG-TIA.

Table V.
Simulation parameters of the CG-TIA.
Case

WMn

RD

5 KHz

2 μm

12.5 MΩ

100 MHz

30 μm

4.5 KΩ

(31)

where g mnB is the transconductance of the biasing current source transistor. The first term in equation (31) is
the noise contribution of R D, the second and third terms
are the input noise caused by M n and the biasing current
source transistor respectively. One of the major drawbacks of the CG-TIA is that the noise of the biasing current source is directly referred to the input. Therefore,
the total input noise is relatively high compared to its
closed loop counterpart. It can be concluded from equation (31) that the second low frequency dominant noise
source is R D . Also, equation (31) shows that the noise of
M n approaches the noise of R D at higher frequencies. Furthermore, since the dominant noise term of the biasing
current source increases with g mnB, the trade-off between
the noise and power consumption is no longer presented.
Simulation parameters of the CG-TIA are listed in table V.

VDD

RD

Rrg

Mn
IPD CPD
Mnrg

IB

Figure 9. Schematic diagram of the RGC-TIA.
20

IEEE CIRCUITS AND SYSTEMS MAGAZINE

Cout

F. Regulated Cascode TIA (RGC-TIA)
The circuit of the RGC-TIA is shown in Fig. 9. It is an enhanced version of the CG-TIA. The key idea is that the
gate of M n is regulated by a common source voltage
amplifier (M rg, R rg). This regulation is achieved by connecting the source of M n to the input of the regulating
amplifier and connecting the output of the regulating
amplifier to the gate of M n . Accordingly, the regulation
boosts the transconductance of M n by a multiplication
factor equals to the gain of this regulating amplifier.
Therefore, the input impedance is decreased and the BW
is extended compared to the CG-TIA.
Thanks to the topology's low input impedance, the
RGC-TIA is used very efficiently to isolate the large area PD
FIRST QUARTER 2020
IEEE Circuits and Systems Magazine - Q1 2020

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