IEEE Circuits and Systems Magazine - Q1 2020 - 24

input photocurrent which is the input current that
causes 1% total harmonic distortion (THD) at the output
[[66]]. The THD is computed according to:

Transimpedance Gain (dBΩ)

160
155
150

THD% =

145
140
135
130
100

1K
10 K
Frequency (Hz)

100 K

CG-TIA
CR-TIA
CR-RGC-TIA
RGC-TIA

CS-TIA
Inv-TIA
InvCas-TIA
RIC-TIA

Input Noise Spectral Density (pA /√Hz)

1.8
1.4
1.2
1
0.8
0.6
0.4
0.2
0
100

CS-TIA
Inv-TIA
InvCas-TIA
RIC-TIA
CG-TIA
CR-TIA
CR-RGC-TIA
RGC-TIA

1K

10 K
100 K
Frequency (Hz)

1M

Figure 13. Input noise current spectral density of the reviewed TIAs while targeting min noise and 5 KHz BW.

(53)

where V1 is the voltage of the fundamental frequency
component, V2, V3, V4 are the second, third, and forth
harmonics. A 50 Hz sin wave is used for the 5 KHz BW
cases and 1 MHz sine wave is used for 100 MHz BW to
compute the THD %. The dynamic range is also listed in
the comparison table and it is described by:
DR = 20 Log

Figure 12. Frequency response of the reviewed TIAs while
targeting min noise and 5 KHz BW.

1.6

V 22 + V 23 + V 24 + f
# 100
V1

I Ovl
p-p
I noise

(54)

It worth denoting that for minimum noise case, the
power would increase when the noise is minimized.
However, to allow reasonable comparison background,
a maximum, equal power value is set for all topologies.
Thus, the studied design noise performance can be exposed at the same power consumption. The same procedure is adopted for the maximum noise limit when
minimizing the power consumption, thus, the studied
topologies power consumption are compared at the
same input referred noise current. Furthermore, the
FoM 1 described by equation (52) is divided by 1000 in
the 5 KHz BW cases for readability.
A. Case 1: CPD = 10 pF, 5 KHz BW, Minimum Noise
The frequency response and the input referred noise
current spectral density of the reviewed TIAs are shown
in Figs. 12 and 13 respectively. Also, a summary of the
obtained simulation results for the minimum noise and
5 KHz BW case is listed in table IX.
Comparing the CS, Inv, InvCas, and RIC-TIA, the RICTIA is able to achieve the highest open loop gain due to

Table IX.
A comparison between the reviewed TIA topologies at C PD = 10 pF and 5 KHz BW while targeting minimum noise.

24

Topology

Gain
(dBΩ)

BW
(kHz)

Total Integrated
Input Noise pA rms

Power
μW

I Ovl
p -p
nAp-p

DR
(dB)

FoM1

FoM2

CS-TIA

139.6

5

5.9

272

77

82.3

297.5

22910.8

Inv-TIA

142.3

5

4.7

272

67

83.1

509.7

34149

InvCas-TIA

143.8

5

3.6

272

44

81.7

790.9

34798

RIC-TIA

145.1

5

3.75

272

41

80.8

882

36154

CR-TIA

156.7

5

4.9

272

2.4

53.8

2565.7

6157.7

CR-RGC-TIA

158.3

5

8.6

272

1.2

42.9

1757.5

2109

CG-TIA

141.5

5

10.56

0.044

0.67

36

1279 x 10

RGC-TIA

144

5

14.3

6.8

0.53

31.4

8149.4

IEEE CIRCUITS AND SYSTEMS MAGAZINE

3

857 x 103
4319.2

FIRST QUARTER 2020



IEEE Circuits and Systems Magazine - Q1 2020

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