IEEE Circuits and Systems Magazine - Q1 2020 - 53

By replacing the definition of a(t ) in (9), we get
y=

Tw

n-1

/ ak #

k=0

0

g ` t n - k j x (0) (t ) dt
Tw

n-1

=

/ a k xu (k0) = a < xu (0)

k=0

where we have implicitly defined a generalized Ny(0)
(0)
(0)
quist-rate samples vector xu (0) = 6xu 0 , xu 1 , f, xu n - 1@ where
samples are taken at Nyquist rate but their amplitude is
related to
Tw

(0)
xt k =

#
0

g ` t n - k j x (0) (t)
Tw

Note that, in many practical cases, xu is not so different from the Nyquist rate sample vector x. In fact,
we have xu = x when g (x) is the standard Dirac delta
operator d (x). Yet, in practical implementations, it is
common to replace d(x) with a normalized pulse equal
to the ideal rectangular pulse | (x) = 1 when 0 # x 1 1,
and | (x) = 0 elsewhere. In this case the generalized
coefficient vector can be considered a good approximation of Nyquist-rate sample vector, i.e., xu . x if the
input signal is quasi-stationary. Note also that the CS

x (l )(t)

x (l +1)(t)

reconstruction procedure will retrieve the generalized
u
sample vector x.
Moreover, if the input signal is low frequency, different approaches are possible. A solution adopted in [37],
[49], [51] is to consider a switched capacitor architecture. In this case, we are dealing with a discrete-time input signal model thanks to the intrinsic sampling capabilities guaranteed by this class of circuits. The generic
l-th time windows of length Tw, defined in the interval
I (l ) is sampled at rate n/Tw to generate a n-length analog
samples vector. Focusing, for the sake of simplicity, on
I (0) = 60, Tw@, we get
x (0) = ;x (0) ^0 h, x (0) c

Tw
T <
m, f, x (0) c^n - 1 h w mE
n
n

The Nyquist samples of the input signal are then processed with a standard multiply-and-accumulate (MAC)
analog architecture, shown in the "analog discrete-time"
case of Figure 9, where a clock signal is assumed whose
period is divided into two phases.
(0)
In the first one, each sample of x k = x (0) (kTw /n) is
multiplied by a k, and the results sampled by the C s . In
the second phase, all the charge stored in C s is transferred to the feedback capacitor C f , that accumulates

x (l +2)(t)
Input Signal

Analog
Continuous-Time

C
R

Q (.)

-
+
Analog
Continuous-Time Integrator

a(t )

Measurements

Analog
Discrete-Time

Cf
Cs

-
+

Q (.)

Switched Capacitors Integrator

a

y (l )

y (l +1) y (l +2)

Digital
a
Q (.)

×

Q ′(.)

Digital Multiply-and-Accumulate

Figure 9. Grand view of a possible actual implementation of a CS-based acquisition system. The input signal x (t ) is first windowed
into non overlapping slices x (l) (t ), x (l +1)(t ), x (l + 2)(t ), f, that generate the measurements y (l), y (l +1), y (l + 2), f respectively. The way how
measurements are computed depends on the input signal. For high frequency signals, the preferred solution is to mix x (t ) with a(t )
and then integrate the result with a continuous-time integrator. Results are then quantized by Q($). For low frequency signals, using
a switching capacitors integration approach is a more common choice. Another possible solution for low frequency signals is the
fully digital approach, where x (t ) is first sampled, quantized by Q($), processed by a standard multiply-and-accumulate architecture
in the digital domain, and optionally re-quantized by Ql($).

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