IEEE Circuits and Systems Magazine - Q2 2020 - 1

Circuits
and Systems
IEEE

MAGAZINE

Volume 20, Number 2 Second Quarter 2020

Features

A New Perspective of Using Integrated On-Chip Syntonistor
for Time Synchronization in Network: Meeting the
TAACCS Challenge
Liming Xiu and Xiangye Wei

The emergence of Internet of Everything combined with the growing transition of telecom system from
traditional wired to wireless technologies have made time-awareness a feature of high priority. One
of the key elements in time-awareness applications is time synchronization, which is accomplished
by synchronizing the clocks of all nodes. From TDM based network having physical connection for
timing signal to connectionless packet-based network, the task of synchronizing clock becomes
increasingly complex. To meet this challenge, a call for innovative design on clock circuitry used in the
communicating nodes is recently put forward in TAACCS (Time-Aware Applications, Computers, and
Communication Systems). In this article, an emerging frequency synthesis technique with features of
small frequency granularity and fast frequency switching is suggested as on-chip integrated syntonistor
for periodically tuning each nodes' clock frequency, to assist the task of time synchronization. This is a
new perspective since it enables the frequency of clock hardware to be tuned continuously for better
synchronization quality, not just the value of time register as traditionally done. This is a multidiscipline
subject involving network architecture, VLSI circuit design and computer science.

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Classification Using Hyperdimensional Computing: A Review
Lulu Ge and Keshab K. Parhi

Hyperdimensional (HD) computing is built upon its unique data type referred to as hypervectors.
The dimension of these hypervectors is typically in the range of tens of thousands. Proposed to
solve cognitive tasks, HD computing aims at calculating similarity among its data. Data transformation is realized by three operations, including addition, multiplication and permutation. Its
ultra-wide data representation introduces redundancy against noise. Since information is evenly
distributed over every bit of the hypervectors, HD computing is inherently robust. Additionally, due
to the nature of those three operations, HD computing leads to fast learning ability, high energy
efficiency and acceptable accuracy in learning and classification tasks. This paper introduces
the background of HD computing, and reviews the data representation, data transformation, and
similarity measurement. The orthogonality in high dimensions presents opportunities for flexible
computing. To balance the tradeoff between accuracy and efficiency, strategies include but are
not limited to encoding, retraining, binarization and hardware acceleration. Evaluations indicate
that HD computing shows great potential in addressing problems using data in the form of letters,
signals and images. HD computing especially shows significant promise to replace machine learning algorithms as a light-weight classifier in the field of internet of things (IoTs).

Printed in U.S.A.

Digital Object Identifier 10.1109/MCAS.2020.2987578

SECOND QUARTER 2020

IEEE CIRCUITS AND SYSTEMS MAGAZINE

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IEEE Circuits and Systems Magazine - Q2 2020

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