IEEE Circuits and Systems Magazine - Q2 2020 - 10

task requiring expertise from computer science, network
architecture, clock and oscillator circuit design, VLSI system design, frequency and timing control, software engineering and etc. We believe that this topic has not been
seriously investigated in the past, mainly due to the lackof-communication among practitioners of those different
fields. For this reason, this work could become the first
step in the direction of bridging the gap.
Section II is the extensive review of the field of time
synchronization, leading to the motivation of TAF-DPS
syntonistor. A brief description of TAF-DPS technology
is provided in section III. Section IV proposes a method
of using TAF-DPS syntonistor in assisting time synchronization. Some suggestions for applying this technique
in the design of future communication equipment are
provided in section V. Section VI is the conclusion.

scenario where clocks are used to measure the real time
when an event occurred in real world, for example, to record the moment-of-time when a rocket is launched from
the launching pad. If t is the real time at which the rocket
is launched, then ;C 1 (t ) - C 2 (t ); represents the difference
in the recording values of two different clocks C 1 and C 2
(For any two physically separated clocks, there always
exists a nonzero ;C 1 (t ) - C 2 (t ); for an event happening at
a particular physical location. This is supported by Einstein's theory of relativity).
c (T ) = t is used for describing an event happened inside a network. Suppose an event E occurs at time T inside
a network made of a plurality of nodes. From each node's
perspective, this very event happens at its own local time
t, which could be different from that of other nodes due to
the difference on physical configuration and variation on
electrical characteristic of the network. Mapping c (T ) = t
serves to reflect the nature of this fact. For instance, if a
II. Review And Motivation
command of all-power-down is issued at clock time T for
all the nodes in the network, c q (T ) and c p (T ) will be the
A. Notion of Time
In the field of time synchronization, there are two key con- real times for this command being issued at node q and p,
cepts regarding time: real time and clock time. Real time respectively, where q and p are any two nodes in the netrefers to the Newtonian time frame that is not -directly work. ;C q (t ) - C p (t ); will be the difference in real time when
observable. Clock time is the reading value from certain the two nodes are actually shut down. A network is synman-made time-keeping devices, such as wrist watch, chronized to a precision g when ;C q (t ) - C p (t ); # g is true.
In the implementation of clock time T, there are two
wall clock, computer clock and etc. Following Lamport
and Melliar-smith's convention [19], we use lowercase t concepts of physical clock and logical (or virtual) clock.
to represent real time and uppercase T for clock time. Logical clock is solely for clock synchronization operaFurther, we use upper case C to define a clock that maps tion while physical clock represents the advance of clock
from real time to clock time C (t ) = T and lower-case c pulses. Those concepts of real time and clock time, physifor mapping from clock time to real time c (T ) = t. These cal clock and logical clock are illustrated in figure 1 (exagtwo mapping functions have fundamentally different im- gerated for illustration purposes). In this article, physical
plications. C (t ) = T means that, at real time t, the clock's clock refers to the hardware oscillator (optionally plus a
reading value is T. This function is used to describe the clock circuit) with a running frequency f. Its reading value
is generated from a counter driven
by this oscillator. Logical clock is
also driven by the oscillator. Its
Physical Clock
Clock Time T
value however can be arbitrarily
adjusted by certain operations
Physical
Counter
(controlled by algorithm).
Clock
Logical
Clock
Moment of
Synchronization

Oscillator

Logical Clock
Synchronizer

Adjuster
c (T ) = t
C (t ) = T

Real Time t

f
Oscillator

Figure 1. Real time and clock time, physical clock and logical clock.
10

IEEE CIRCUITS AND SYSTEMS MAGAZINE

Timing
Data

B. Frequency, Phase and
Time Synchronization
Synchronization can be deployed
into a network at three levels: frequency, phase and time. Frequency synchronization is the most
straightforward one since an accurate frequency can exist standalone without the concern of time.
There are two architectures for
the nodes in a network to share a
common frequency. The first one
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IEEE Circuits and Systems Magazine - Q2 2020

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