IEEE Circuits and Systems Magazine - Q2 2020 - 21

■■ All the factors contributing to clock hardware's

frequency error is lumped into one parameter x.
■■ The syntonization method recommended in IEEE

802.1AS-2011 [30] is used in estimating the value for x.
R[k q $ M ] - R 6k (q - 1) $ M @
T iP [k q $ M ] - T iP [k (q - 1) $ M ]
, fi [k q $ M] =
M $ Tt
M $ Tt
(8)
f0 =

	

x =1-

T iP [k q $ M ] - T iP [k (q - 1) $ M ]
(9)
R[k q $ M ] - R[k (q - 1) $ M ]

fi 6f(q + 1) $ M @ = fi 6k q $ M @ $ (1 + x) = f0 (1 - x 2 )
fi 6f(q + 2) $ M @ = fi 6k (q + 1) $ M @ $ (1 + x 2 ) = f0 (1 - x 4 )
	

h
2
fi 6f(q + n) $ M @ = fi 6k (q + n - 1) $ M @ $ (1 + x n ) = f0 (1 - x n ) . f0 (10)
According to IEEE 802.1AS-2011, frequency ratio of
master and slave clocks can be estimated as the ratio
of elapsed times between two consecutively received
timestamps of the two clocks [30]. The value of x can
then be calculated from (8) and (9) at the beginning of
a syntonization period. Practically speaking, x % 1 for
real world applications. By using (6), this value will be
applied to the control word F of TAF-DPS circuit. The
action for compensating x is shown as the procedure in
(10). At each of the following syntonization period, the
value of x new is recalculated using (9). It is expected that
x new 1 ; x ;, since frequency error is gradually diminishing in each period. After a few steps, the clock circuit's
output frequency shall approach f0 quickly as shown in
(10). This is a continuous procedure and eventually the
frequency error will be practically zero. If this is not the
case (i.e. x new $ ; x ; ), it indicates that something happened during last period and the clock's frequency has
been disturbed. Then, the procedure can be restarted
from the beginning, using x new as the new starting point.
	

E . -c x +

x 2 (11)
m
1 - x2

During this process, although frequency error
is diminishing, the time error on physica l clock

p

;T i [k] - R [k] ; /(M $ Tt ) will grow. But it will be bounded
since the clock hardware's frequency is being corrected continuously and the frequency error will eventually become zero. Therefore, the time error on physical
clock will gradually reach a final-state value E, which is
-expressed in (11). We can then make an effort to improve
time synchronization accuracy with the help from logical clock T li [k] . At the beginning of each syntonization
period when x becomes available, E is calculated using
(11). During next (M/N - 1) synchronization intervals,
the error of E is compensated by amortization. A linear
time function is implemented to spread the error over
(M/N - 1) intervals.
C. Simulation
SimEvents® from MathWorks® is a tool for studying the
performance of distributed control systems, software
and hardware architectures, and communication networks. It is used in this work for verifying our method.
A network made of ten nodes is constructed using this
tool. A golden reference R[k] representing real time t is
controlled by k. In simulation, R[k] is given an ideal rate
of 1. For each of the ten nodes-under-study, its rate is
assigned as fi [k] = 1 - x + re, where x is the rate-error
introduced before and re is a number representing random frequency variation. Their values are constrained
in the ranges of x ! [- 0.1, 0.1] and re ! [- 0.02, 0.02], respectively. The " 10% rate offset and " 2% random variation are not realistic. They are several orders larger
than the values observed in real cases. We want to use
those large values to amplify the effects-under-study.
In simulation, Tt = 0.01 is used for each increment of k.
Synchronization interval is selected as N = 1000 ticks
and syntonization period is M = 10 $ N = 10000.
Figure 11 shows the behavior of one of the nodes
when there is no synchronization algorithm activated
(i.e. free-run scenario). The top graph is the trajectories
p
of physical clock T i [k] and reference R[k]. The graph in
p
the middle is the ;T i [k] - R [k] ; (representing time error). As seen, the error grows uncontrolled since there
is no action of synchronization. The bottom graph (red

Tick

Synchronization Interval: N Ticks

Synchronization Period: M Ticks

Figure 10. Tick, synchronization interval N and syntonization period M.

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IEEE Circuits and Systems Magazine - Q2 2020

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