IEEE Circuits and Systems Magazine - Q3 2020 - 32

University of Alberta, Edmonton, AB, Canada, in 2019. He
is currently a postdoctoral researcher in the Department of Electrical and Computer Engineering at McGill
University, Montreal, QC, Canada. His current research
interests are in stochastic computing and its applications in artificial intelligence.
Warren J. Gross received the B.A.Sc. degree in Electrical Engineering from the
University of Waterloo, Waterloo, ON,
Canada, in 1996, and the M.A.Sc. and
Ph.D. degrees from the University of Toronto, Toronto, ON, Canada, in 1999
and 2003, respectively. He is currently a Professor, the
Louis Ho Faculty Scholar in Technological Innovation,
and the Chair of the Department of Electrical and Computer Engineering, McGill University, Montreal, QC, Canada. His research interests are in the design and implementation of signal processing systems and custom
computer architectures.
Dr. Gross served as the Chair for the IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems. He served as
the General Co-Chair for the IEEE GlobalSIP 2017 and the
IEEE SiPS 2017 and the Technical Program Co-Chair for
SiPS 2012. He served as an Associate Editor for the IEEE
TRANSACTIONS ON SIGNAL PROCESSING and as a Senior Area Editor. He is a Licensed Professional Engineer
in the Province of Ontario.
Jie Han (S'02-M'05-SM'16) received the
B.Sc. degree in electronic engineering
from Tsinghua University, Beijing, China, in 1999 and the Ph.D. degree from
the Delft University of Technology, The
Netherlands, in 2004.
He is currently a Professor in the Department of Electrical and Computer Engineering at the University of
Alberta, Edmonton, AB, Canada. His research interests
include approximate computing, stochastic computing,
reliability and fault tolerance, nanoelectronic circuits
and systems, novel computational models for nanoscale
and biological applications.
Dr. Han was a recipient of the Best Paper Award at
the International Symposium on Nanoscale Architectures (NanoArch) 2015 and Best Paper Nominations at
the 25th Great Lakes Symposium on VLSI (GLSVLSI)
2015, NanoArch 2016 and the 19th International Symposium on Quality Electronic Design (ISQED) 2018. He was
nominated for the 2006 Christiaan Huygens Prize of Science by the Royal Dutch Academy of Science. His work
was recognized by Science, for developing a theory of
fault-tolerant nanocircuits (2005).
32 	

He is currently an Associate Editor for the IEEE Transactions on Emerging Topics in Computing (TETC), the
IEEE Transactions on Nanotechnology, the IEEE Circuits and Systems Magazine, the IEEE Open Journal of
the Computer Society, and Microelectronics Reliability (Elsevier Journal). He served as a General Chair for
GLSVLSI 2017 and the IEEE International Symposium on
Defect and Fault Tolerance in VLSI and Nanotechnology
Systems (DFT) 2013, and a Technical Program Committee Chair for GLSVLSI 2016, DFT 2012 and the Symposium on Stochastic & Approximate Computing for Signal
Processing and Machine Learning, 2017.
References
[1] B. R. Gaines, Stochastic Computing Systems. Boston, MA: SpringerVerlag, 1969, pp. 37-172.
[2] W. Qian, X. Li, M. D. Riedel, K. Bazargan, and D. J. Lilja, "An architecture for fault-tolerant computation with stochastic logic," IEEE Trans.
Comput., vol. 60, no. 1, pp. 93-105, 2011. doi: 10.1109/TC.2010.202.
[3] P. Li and D. J. Lilja, "Using stochastic computing to implement digital
image processing algorithms," in Proc. 2011 IEEE 29th Int. Conf. Computer Design (ICCD), pp. 154-161. doi: 10.1109/ICCD.2011.6081391.
[4] S. C. Smithson, N. Onizawa, B. H. Meyer, W. J. Gross, and T. Hanyu,
"Efficient CMOS invertible logic using stochastic computing," IEEE
Trans. Circuits Syst. I, Reg. Papers, vol. 66, no. 6, pp. 2263-2274, June
2019. doi: 10.1109/TCSI.2018.2889732.
[5] W. Maass and C. M. Bishop, Pulsed Neural Networks. Cambridge, MA:
MIT Press, 2001.
[6] Y. Liu, S. Liu, Y. Wang, F. Lombardi, and J. Han, "A stochastic
computational multi-layer perceptron with backward propagation,"
IEEE Trans. Comput., vol. 67, no. 9, pp. 1273-1286, 2018. doi: 10.1109/
TC.2018.2817237.
[7] J. Zhao, J. Shawe-Taylor, and M. van Daalen, "Learning in stochastic
bit stream neural networks," Neural Netw., vol. 9, no. 6, pp. 991-998,
1996. doi: 10.1016/0893-6080(96)00025-1.
[8] B. D. Brown and H. C. Card, "Stochastic neural computation. I. Computational elements," IEEE Trans. Comput., vol. 50, no. 9, pp. 891-905,
2001. doi: 10.1109/12.954505.
[9] D. Zhang and H. Li, "A stochastic-based FPGA controller for an
induction motor drive with integrated neural network algorithms,"
IEEE Trans. Ind. Electron., vol. 55, no. 2, pp. 551-561, 2008. doi: 10.1109/
TIE.2007.911946.
[10] Y. Ji, F. Ran, C. Ma, and D. J. Lilja, "A hardware implementation of
a radial basis function neural network using stochastic logic," in Proc.
Design, Automation and Test Europe Conf. (DATE), 2015, pp. 880-883.
[11] V. Canals, A. Morro, A. Oliver, M. L. Alomar, and J. L. Rosselló, "A
new stochastic computing methodology for efficient neural network
implementation," IEEE Trans. Neural Netw. Learn. Syst., vol. 27, no. 3, pp.
551-564, 2016. doi: 10.1109/TNNLS.2015.2413754.
[12] A. Ardakani, F. Leduc-Primeau, N. Onizawa, T. Hanyu, and W. J.
Gross, "VLSI implementation of deep neural network using integral
stochastic computing," IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,
vol. 25, no. 10, pp. 2688-2699, 2017. doi: 10.1109/TVLSI.2017.2654298.
[13] A. Ren et al., "SC-DCNN: Highly-scalable deep convolutional neural
network using stochastic computing," in Proc. 22nd Int. Conf. Architectural Support for Programming Languages and Operating Systems (ASPLOS),
2017, pp. 405-418. doi: 10.1145/3093336.3037746.
[14] V. T. Lee, A. Alaghi, J. P. Hayes, V. Sathe, and L. Ceze, "Energy-efficient hybrid stochastic-binary neural networks for near-sensor computing," in Proc. Design, Automation and Test Europe Conf. and Exhibition (DATE), 2017, pp. 13-18. doi: 10.5555/3130379.3130383.
[15] R. Hojabr et al., "SkippyNN: An embedded stochastic-computing
accelerator for convolutional neural networks," in Proc. 56th Annu. Design Automation Conf. (DAC), 2019, pp. 1-6.
[16] Y. Liu, L. Liu, F. Lombardi, and J. Han, "An energy-efficient and
noise-tolerant recurrent neural network using stochastic computing,"
IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 27, no. 9, pp. 2213-
2221, Sept. 2019. doi: 10.1109/TVLSI.2019.2920152.

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THIRD QUARTER 2020
IEEE Circuits and Systems Magazine - Q3 2020

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