IEEE Circuits and Systems Magazine - Q3 2020 - 37

Recently-developed embedded resistors and capacitors
makes it possible to add series components to striplines
[20], [21]. This requires additional materials and fabrication steps to pattern the required components within the
PCB. The cost and tolerances of such components make
striplines less attractive for circuits with lumped elements.
B. Return Path
Regardless of the TL structure used in the design, a
closed path for the current to return is required. In other words, the ground return path is part of the TL, and
disturbing it can result in adverse reflections and radiations. Without loss of generality, the discussion below
assumes microstrip lines for demonstration.
Without any discontinuity in the ground return path,
two parallel microstrip lines show low loss, and effectively no crosstalk between them (crosstalk is discussed in
detail in Section IV-C). This is demonstrated in Fig. 3(a).
Fig. 3(b) shows a transmission line with a slot in the
ground return path. This discontinuity could be due to
routing congestion from an inner layer for example. The
discontinuous return path causes high reflections, and
increases the crosstalk between parallel lines, resulting
in interference. The transmitted signal is also attenuated,
primarily due to radiation.
In order to avoid such problems, a smooth continuous ground return path should be maintained. This
might imply re-routing over a longer path as shown in
Fig. 3(c). With this setup, the coupling and the loss are
reduced significantly.
Alternatively, if re-routing is not possible, a capacitor (or
more) can be added in shunt with the discontinuity to provide a low-impedance ac return path, as shown in Fig. 3(d).
To compare the performance of the scenarios discussed above, their transmission, reflection, forward
crosstalk, and backward crosstalk are shown in Fig. 3(e)(h), respectively. Those structures are simulated using
Ansys High-Frequency Structure Simulator (HFSS).
Similar concepts hold for differential signals. A detailed study on how ground discontinuities affect the
differential impedance is demonstrated in [22].
It is important to mention that in some cases ground discontinuities (defected ground structures) are is intentionally added to the design [23]. This can give favorable advantages in harmonics handling. This is typically for specific
RF applications and beyond the focus of this paper.
C. Matching
Except for RF and other controlled impedance applications, a typical PCB trace has Z 0 . 100 . Driving amplifiers, and receivers, however, can have different impedances. This results in reflected signals, with a reflection
coefficient given by
THIRD QUARTER 2020 		

	

C=

Z L - Z0
. (1)
Z L + Z0

Where ZL is the load impedance. To find the reflection from
the source, the source impedance ZS replaces ZL in (1).
Reflections in PCBs are typically neglected for traces
with a short electrical lengths. For analog/RF signals
with a guided wavelength m, the electrical length needs
to be less than m/15 for the matching to be negligible.
The electrical length for digital signals is found with respect to the rise time of the signal, rather than the operating
frequency. Generally speaking, if the rise time is more than
twice the propagation delay of the line ( x RISE 2 2 # t P ), then
matching might not be necessary [1], as shown in Fig. 4.
In order to justify the importance of the rise time in
digital signals, a frequency domain analysis is used [24].
The Fourier expansion of clock signal (with zero rise
time and 50% duty cycle) is given by
	

3
sin (k~ 0 t)
s (t) = V DD e 1 + 2 /
o . 	(2)
k
2 r k = 1, 3, 5, g

This can be written in frequency domain as
S CLK (~) = V DD 2rd (~) +
3
V DD / 2 ^d (~ - k~ 0) + d (~ + k~ 0) h .
k
k = 1, 3, 5, g
(3)
Where d is the Dirac delta function. In (3), it can be seen
that the spectrum is enclosed in an envelope with -20 dB/
decade, as shown in Fig. 5(a). This means that harmonics will exist at much higher frequency than the operating frequency. The electrical length of a trace can become significant at those high-frequency harmonics.
A more practical clock, with a non-zero rise time
(xRISE), has a spectrum given by
	

S TRAPEZOIDAL (~) = 2

sin (

~x RISE
~

2

)

S CLK (~) . 	(4)

The first expression in (4) is the frequency representation of a single pulse with a width of xRISE (the rise
time). This expression results in an additional −20 dB/
decade envelope to the frequency response, reducing
the amplitude at high frequencies as shown in Fig. 5(b).
Increasing the rise time can be achieved by adding a
series resistance at the source of the signal, as shown in
Fig. 6(a). This can also be justified using the reflection theory discussed earlier in this section. Since the output impedance of a driver is typically small, the added series resistance increases the effective source impedance closer
to Z0, which reduces the reflections from the source.
In other words, increasing the rise time improves the
digital signal integrity. This source matching, however,
can limit the achievable data rate (shrinking the eye
diagram). As a result, a compromise exists between the
data rate and the quality of the signal.
IEEE CIRCUITS AND SYSTEMS MAGAZINE	

37
IEEE Circuits and Systems Magazine - Q3 2020

Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q3 2020
