Where C1 = C4 and C2 = C3. This equation is also valid for the configuration in Fig. 17. IV. Common Gate Colpitts Oscillator As explained earlier, the Colpitts oscillator can also be realized using a Common Gate Amplifier (CGA) configuration [34]. Fig. 25 shows the common gate Colpitts oscillator, where the transistor MN1 is the amplifying device providing the necessary gain to the circuit and MN2 is the biasing transistor. An analysis of this topology can be found in [86], [87]. This circuit can be used to drive a resonator or a FBAR simply by replacing the inductor in the oscillator. A 2.4-GHz version of this circuit in bipolar technology is presented in [88]. Small signal model of the CG Colpitts is shown in Fig. 26, which shows the characteristic tank configuration of the Colpitts with two capacitors and an inductor. Fig. 27 shows a low voltage and low power common gate Colpitts presented in [45], [46]. In this circuit, the C1 MP1 Vout1 A. Differential Push-push Common Gate Colpitts Oscillator By connecting two single-ended common gate oscillators as shown in Fig. 25, it is possible to create a differential push-push common gate oscillator. In order to achieve the differential behavior, it is necessary to relate the two circuits to each other signal wise. The simplest way of achieving that is to create an inductive coupling L1 Vout Vbias1 MN1 Vbias2 MN2 C1 C2 Vbias1 e C2 Figure 25. Single-ended common gate Colpitts topology. MP2 Vdd/2 L Vout2 - iasing transistor is replaced by an inductor and the b gate is biased through an inductor to achieve inductive gate degeneration and low voltage operation down to 20 mV and a power consumption down to 4 nW at 2.2 GHz. Vout MN2 C3 a C4 MN1 C1 gm Vs L1 I C2 Vbias2 Figure 26. Small signal model of the common gate Colpitts topology shown in Fig. 25. Figure 23. Schematic of the Complementary Differential Common Drain (CDCD) Colpitts oscillator. Vdd/2 Rp Vout Vout2 Vout1 gmp2Vout1 L1 Lg C2 C1 L MN1 C3 C4 C1 gmn2Vout2 Rn Figure 24. Small signal model of the CDCD Colpitts oscillator shown in Fig. 23. FOURTH QUARTER 2020 Ls C2 Figure 27. Low power common gate Colpitts topology with inductive gate degeneration. IEEE CIRCUITS AND SYSTEMS MAGAZINE 17