IEEE Circuits and Systems Magazine - Q4 2020 - 58

IV. Current Technical Challenges of
Broadband Doherty PA
Even though there have recently been a huge development in the broadband Doherty PAs, there are still some
limiting factors which restricts the further extension
of bandwidth. Some scholars are focusing on solving
or eliminating these limiting factors. This chapter will
describe the current technical challenges of broadband
Doherty PA in more details.
Firstly, the structure of broadband Doherty PAs needs
to be further improved. In [31], a multiple resonance circuit (MRC) has been newly proposed as FII of the peaking
amplifier. With the help of multiple resonances, the overall electrical length of the peaking FII is 0Â° at the center frequency. The transistor internal network is compensated
by the MRC. More importantly, the MRC provides the quasi-lumped carrier FII with an optimized susceptance for
maximizing bandwidth. It can be seen that more related
works could be further developed in the future.
Secondly, the post-matching Doherty PA peaking branch
still suffers from the high impedance transformation ratio.
This is because the real part of optimal drain impedance
for the peaking device (Zopt,p) is generally smaller than
the one for the carrier device. The peaking branch needs
to transform the impedance from 2RL to Zopt,p. In [44], a
Doherty PA design based on an improved peaking transformer was proposed. A transformer is inserted into the
FII of the peaking amplifier, resulting in a bandwidth extension. Consequently, Doherty behavior can be achieved
over a broad bandwidth while simultaneously maintaining an ideal power utilization factor (PUF), e.g. ratio between the output power of the DPA and the sum of the
transistor's power. Moreover, the peaking FII using band
pass topology was also used to minimize the impact of
frequency dispersion.
Thirdly, the phase dispersion of FIIs is inevitable.
Conventional FII used in Doherty PAs often needs to
convert the different impedance condition at back-off
and saturation. Consequently, large phase delays can be
introduced which vary with frequency resulting in performance degradation over wide bandwidths. In [53], a
novel impedance inverter architecture for Doherty-like
PAs based on a paralleled right and left-handed network
was proposed. The main purpose of the proposed impedance inverter is to achieve minimum phase delay
but not at the expense of load modulation bandwidth,
thereby resulting in a wider bandwidth.
V. Doherty PA For 5G
With the release of objectives for 5G wireless systems,
clearer requirements are now available. It is composed
of expanded capacity (over 100x), higher 1 Gb/s data
rates, lower than 1mS latency and improved Quality of
58â

-xperience (QoE). Moreover, extended battery life is
E
desired, which requires high efficiency PAs. Hence, 5G
presents fertile ground for PA innovation. A cornerstone
in 5G will be the use of a large numbers of " small cells, "
each with coverage that extends to distances of 200-300 m
or less. The frequency ranges have been articulated to
deploy systems progressively below 6 GHz, followed by
6-30Â GHz cm-wave and later the 30-100 GHz mm-waves
[54]. Due to the high efficiency at and above the OBO
point, Doherty PAs will play a major role in 5G cm and
mm-wave PA/antenna arrays. For different power levels
and different operating frequencies, there are some different processes available (such as CMOS, GaAs and GaN).
In [55], at 60 GHz, a Doherty PA was designed based on
65-nm bulk CMOS process. To solve the low trans-conductance caused by the use of class-C operation, an adaptive
biasing network was devised to dynamically adjust the
bias voltage of the peaking PA. The circuit diagram of this
circuit [55] is shown in Fig. 15. The Doherty PA achieved
22% saturated drain efficiency with a power of 13.2 dBm
at center frequency. The measured results showed over
17% and 8% efficiencies at peak and 6-dB back-off power
that covered 57 to 64 GHz frequency range.
The PAs relied on large transistors to achieve high
output powers. However, the parasitic output capacitance of the transistors limited the bandwidth of the
amplifiers. Recent implementations of CMOS mm-wave
PAs uses transformer-based power combining in order
alleviate the tradeoff between bandwidth and output
power. In this architecture, small wideband PAs were
combined with a voltage-combining transformers to
realize high output power levels. A transformer-based
Doherty amplifier which combined a class-AB with a
class-C amplifier by using a series-combining transformer, is shown in Fig. 16. The class-AB carrier amplifier operates over the entire power range, while the
class-C peaking amplifier only operates above a certain
input power level. This, resulted in power saving when
only low output power was required. Similar to the conventional Doherty, this transformer-based topology
also required amplifiers with high output impedance to
allow this enhancement of back-off efficiency. Non-ideal
finite output impedance of the peaking amplifier loaded
the series-combining transformer, and resulted in lower efficiency when the auxiliary amplifier was off. For
RF applications, highly coupled transformers together
with large amplifier output impedance will minimize
the reduction in efficiency.
In [56], a transformer-based Doherty PA technique
was exploited at mm-Wave frequencies. To improve the
linearity and back-off efficiency, an asymmetrical series
power combiner with LC tuning circuits was proposed.
To further increase output power, a parallel combiner

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