IEEE Circuits and Systems Magazine - Q4 2021 - 39
University, Nanjing, China. His current research interests
include speech recognition and low voltage circuits.
Zhen Wang received the B.S. degree in
Radio from Southeast University in 2002
and the M.S. degree and Ph.D. degree in
Electronic Science and Engineering from
Southeast University in 2005 and 2018.
He is now working in Nanjing Prochip
Electronics technology Co., Ltd. His research interests
include calculation in memory, low power circuit and
the AI voice circuit.
Weiqiang Liu (Senior Member, IEEE) is
currently a Professor and the Vice Dean
of College of Electronic and Information
Engineering, Nanjing University of
Aeronautics and Astronautics (NUAA),
Nanjing, China. He received the B.S.
degree in Information Engineering from NUAA and the
Ph.D. degree in Electronic Engineering from Queens
University Belfast (QUB), Belfast, United Kingdom, in
2006 and 2012, respectively. In Dec. 2013, he joined the
College of Electronic and Information Engineering,
NUAA. He has served as a Guest Editor of Proceedings
of the IEEE and Associate Editors of IEEE Transactions
on Circuits and Systems I: Regular Paper, IEEE Transactions
on Emerging Topic in Computing and Computers,
IEEE Transactions on Computers, and a Steering
Committee Member of IEEE Transactions on VLSI Systems
and IEEE Transactions on Multi-Scale Computing
Systems. He is the Program Co-Chair of IEEE Symposium
on Computer Arithmetic (ARITH), and program
members for a number of international conferences.
His papers were selected as the Highlight Paper of
IEEE TCAS-I in the 2021 January Issue and the Feature
Paper of IEEE TC in the 2017 December issue. He received
the prestigious Excellent Young Scientists
Fund from NSFC in 2020. His research interests include
emerging technologies in computing systems,
computer arithmetic, hardware security and VLSI design
for digital signal processing and cryptography.
He has published one research book by Artech House
and over 130 leading journal and conference papers.
He is a Senior Member of the IEEE and the Chinese Institute
of Electronics.
Jun Yang (Member, IEEE) is professor
in National ASIC Center, Southeast University,
Nanjing, China. He received the
B.Sc., M.Sc. and Ph.D. degree at Southeast
University in 1999, 2001 and 2004.
His research interests include near
FOURTH QUARTER 2021
threshold circuit design and ultra-low power indoor/outdoor
position algorithm and chips. He is now close collaborated
with SMIC and TSMC to develop near threshold
IP, such as embedded memories, standard cell
library and other RF components. Jun Yang owned 3 US
patents, 1 EU patent, over 30 Chinese patents and coauthored
over 30 academic papers. He supervised and
graduated over 30 Masters and Ph.D. students. He is the
recipient of several national awards including the State
Science and Technology Awards.
References
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[2] Z.K. Veton, and A.E. Hussien, " Robust speech recognition system
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IEEE, 1991, pp. 800-804. doi: 10.1109/ACSSC.1991.186557.
[6] H. Bae, H. Lee and S. Lee, " Voice recognition based on adaptive
MFCC and deep learning, " in Proc. IEEE 11th Conf. Ind. Electron. Appl.
(ICIEA), Hefei, 2016, pp. 1542-1546. doi: 10.1109/ICIEA.2016.7603830.
[7] G. Chen, C. Parada and G. Heigold, " Small-footprint keyword spotting
using deep neural networks, " in Proc. IEEE Int. Conf. Acoust., Speech
Signal Process. (ICASSP), Florence, 2014, pp. 4087-4091. doi: 10.1109/
ICASSP.2014.6854370.
[8] J. S. P. Giraldo, S. Lauwereins, K. Badami and M. Verhelst, " Vocell:
A 65-nm speech-triggered wake-up SoC for 10-μW keyword spotting
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[9] S. Yin, O. Peng, S. Zheng, D. Song, and S. Wei, " A 141 μW, 2.46 pJ/neuron
binarized convolutional neural network based self-learning speech
recognition processor in 28nm CMOS, " in Proc. IEEE Symp. VLSI Circuits,
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[10] S. Zheng et al., " An ultra-low power binarized convolutional neural
network-based speech recognition processor with on-chip self-learning, "
IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 66, no. 12, pp. 4648-4661, 2019.
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[11] W. Liu, Q. Liao, F. Qiao, W. Xia, C. Wang and F. Lombardi, " Approximate
designs for fast Fourier transform (FFT) with application
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[12] B. Liu et al., " A 22 nm, 10.8 μW/15.1 μW dual computing modes
high power-performance-area efficiency domained background
noise aware keyword-spotting processor, " IEEE Trans. Circuits Syst. I,
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[13] W. Liu, L. Qian, C. Wang, H. Jiang, J. Han and F. Lombardi, " Design
of approximate Radix-4 booth multipliers for error-tolerant computing, "
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[14] J. E. Volder, " The CORDIC trigonometric computing technique, " IRE
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[15] A. Varga and H. J. M. Steeneken, " Assessment for automatic
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IEEE
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IEEE Circuits and Systems Magazine - Q4 2021
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