IEEE Circuits and Systems Magazine - Q1 2021 - 10

mitigating the problem of carry chains, it lowers the
complexity of the multiplication, division, and squareroot arithmetic operations [11]. RNS [4] is a type of nonpositional number system in which integers are represented as a set of smaller residues that can be processed
independently and in parallel. Stochastic Computing (SC)
and Hyper-Dimensional Computing (HDC) introduce robustness against randomness in number representation.
SC represents the probability of a bit taking the value '1'
or '0' in a bitstream, regardless of its position [56], processing data bitwise with simple circuits. HDC operates
on very large binary vectors assuming that information is
represented in a highly structured way using hyperdimensional vectors, as in the human brain, where details are
not very important for data processing [70].
Section III is devoted to the analyses of new technologies and computing paradigms. Nanotechnologies, such
as spin transistors, superconducting electronics, molecular electronics, and resonant tunneling devices, have
emerged as alternative technologies to CMOS [1], while
Deoxyribonucleic Acid (DNA)-based computing [163]
and Quantum Computing (QC) [155] are new computing
paradigms. It is shown that nonconventional arithmetic
is fundamental not only in the design of efficient computer systems based on these new paradigms and technologies but also in the mitigation of some of its intrinsic
disadvantages. For example, it is shown that the RNS is
useful in designing energy-efficient integrated photonicsbased computational units and in overcoming the negative effects caused by the instability of the biochemical
reactions and the error hybridizations in DNA computing
[113], as highlighted in Fig. 3. Furthermore, it is discussed
how SC can be applied to mitigate the deep pipelining nature of the AQFP logic devices, while HDC may support
computing nanosystems through the heterogeneous integration of multiple emerging nanotechnologies [106].

Table I.
IEEE 754 single-precision FP and LNS, 32-bit formats.
S FP
(sign bit)

E FP (exponent):
8 bits

F FP (mantissa):
23 bits

S LNS (sign
bit)

ITLNS (integer):
8 bits

F LNS (fractional):
23 bits

P = -1S FP # 1.F FP # 2 E FP - 127
p = -1S LNS # 2 IT LNS .F LNS
Absolute
Values

Minimum
-126

Maximum

P (FP)

-38

2 +128 . 3.4 # 10 +38

p (LNS)

2 -128 . 2.9 # 10 -39

2 +128 . 3.4 # 10 +38

. 1.2 # 10

IEEE CIRCUITS AND SYSTEMS MAGAZINE

In Section IV, two classes of applications are considered as examples of use cases that highly benefit
from nonconventional arithmetic: machine learning and postquantum cryptography. While quantumresistant cryptography makes use of RNS and SC, as
shown in Fig. 3, machine learning applications may
take advantage of all the classes of nonconventional
arithmetic considered in this paper. For example, the
Deep Learning (DL) framework that adopts AQFP to
achieve high energy efficiency with superconductivity
is an example of SC to machine learning on emerging
technologies [79].
The goal of this paper is to provide a survey on
nonconventional computer arithmetic circuits and systems, describing their main characteristics, mathematical tools and algorithms, and to discuss architectures
and technologies for their implementation. We follow a
tutorial approach on how to use nonconventional arithmetic to compute emergent applications and systems,
and in the end, we draw some conclusions and ideas
for future research work. We find that this work can be
useful for engineers and researchers in computational
arithmetic, in particular as a source of inspiration for
doctoral students. We also provide more than one hundred and seventy references to the most important
works related to nonconventional computer arithmetic,
distributed according to the main topics and sections
presented in Fig. 3.
II. Nonconventional Number Systems:
Arithmetic and Architectures
This section introduces the LNS, RNS, SC and HDC
nonconventional representations and the associated
arithmetic properties. These properties are then
leveraged in the design of arithmetic units found in
many processors.
A. Logarithmic Number Systems
The LNS has been proposed for both the fixed-point
[10] and floating-point [11] formats. In the standardized
IEEE 754 single-precision Floating Point (FP) format,
a number P may assume the normalized absolute values in Table I. For a 24-bit mantissa, if the hidden bit is
counted, the effective resolution is between one part in
2 23 and one part in 2 24, approximately 10 -7. Note that
the boundary values for the exponent (0 and 255) are
reserved for special cases.
FP is a " semi-logarithmic " representation with a
fixed-point component-significand or mantissa-that
is scaled by a factor-the exponent-that is represented
by its logarithmic value in base 2. In comparison, the
same number P is represented in LNS by the 3-tuple (b,
s, p), where b is the adopted logarithm base (without
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