IEEE Circuits and Systems Magazine - Q1 2021 - 70

the reported results. On the other hand, the detection
accuracies in [58] were reported to be of -0.8% error for
RR detection and 0.4% for HR, with a maximum error of
2% when the subject is facing away from the radar. Meanwhile in [57], errors of HR detection for multiple targets
at different distances from the radar are reported to be
about 2% and 5% error for the closest and furthest target,
respectively. Finally, when a CS algorithm was processed
in [2], an error of up to 6.63% was reported at 80% of frequency points. The implementation of SSM algorithm, on
the contrary, resulted in about 1.2% error at normal incidence, whereas changing target orientation at different
angles produced errors ranging from 0.4% to 5.7%.
It is important to note that several literatures on
SFCW radars ([9], [55], [58] and [57]), listed in Table 9,
did not specify their processing platforms. In [56] and
[2], a standard desktop computer was used as the
main processing unit. These articles are focused proving the viability of the algorithm when applied to the
SFCW radar for detection and monitoring of HR and
RR. Therefore, accuracy is the most important parameter to be reported. Another important observation
is that none of these algorithms are designed and
implemented on FPGAs. When an algorithm is implemented in software loaded into the CPU of a desktop
for execution, it implies that the implementation of
the algorithm is performed in a sequential manner.
In such cases, execution speed, processing time, and
the potential to apply such algorithm in real time applications are in doubt. Moreover, the aspects of computational speed, hardware complexity, and cost are
elements of less importance in the cited studies. An
important final step for such investigations must be
tailored towards successfully incorporating these elements (speed, time, hardware, real time) in the performance metrics without deteriorating the state-of-theart results of reported accuracies.
The discussion of the available algorithms applied
for SFCW radars indicated that all of them have been
validated to be detecting human vital signs with satisfactory accuracy. However, since these algorithms have
neither been implemented on FPGA nor been investigated in terms of speed and processing time, future researches can be directed towards this aspect. Specifically, these algorithms are as follows:
■ Constant false alarm rate (CFAR)
■ Singular value decomposition (SVD)
■ State space method
■ Method of moment (MoM)
■ Fast multipole method (FMPM)
Investigation on the most efficient approach of implementing these algorithms on FPGA can be further conducted. The aspect of processing speed in using SFCW
70

IEEE CIRCUITS AND SYSTEMS MAGAZINE

radar detection for human vital signs can be improved
as real time detection with more computationally complex and time-consuming processing should be feasible.
VIII. Conclusion
This survey reviewed the recent developments of radars for vital sign detection, with a special focus on the
signal-processing platform and the algorithms' implementation using FPGAs. This review first introduced
the various types of radars, architectures, hardware
implementation, and methods of detection/sensing. Recent developments suggest that research in this area
has prioritized efforts in designing suitable algorithms
and processing architectures to meet the challenging
real-time detection requirement. These recent trends
also suggested that more research is being channeled
towards investigating the more complex types of radars
(i.e., FMCW and SFCW). Researchers are also striving to
acquire better measurement accuracy, while investigating more practical use-cases, such as improving the detection distance between radar and target, introducing
intentional unwanted movements in the measurements
by setting up the experiment in a noisy environment,
etc. As research in this area progresses, more attention
must be given to implementing real time processing on
these (near) practical scenarios. This can be done by
introducing novel methods and algorithms for signal extraction on dedicated and powerful processing devices.
Acknowledgment
The authors extend their appreciation to the Deputyship
for Research and Innovation, " Ministry of Education " in
Saudi Arabia for funding this research work through the
project number IFKSURG-1438-092.
Ameen Bin Obadi is a PhD student at
Universiti Malaysia Perlis, Malaysia
(UniMAP). Ameen obtained his BSc. Degree (Hons) at King Fahd University of
Petroleum and Minerals (KFUPM), Saudi
Arabia (2010) in electrical engineering
and his MSc. Degree as well at KFUPM, Saudi Arabia
(2014) in electrical engineering (Analog & digital electronics). He worked as an IP Commercialization Executive at
Dhahran Techno-Valley Company and as a manager of
technology venture development at RPDC. His experience in this area ranges across managing a portfolio of
technologies including evaluation, marketing, technology
advancements, licensing and/or spin-outformation. He
backed up his experience in technology commercialization with training sessions in Europe and the US provided
by ASTP-PROTON and AUTM. He started his career at the
Japanese company JGC Gulf in the oil & gas EPC industry
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