IEEE Circuits and Systems Magazine - Q1 2021 - 86

Poster Chairs: Cristina Meinhardt, UFSC, Brazil and
Alexandra Zimpeck, UCPel, Brazil
Web Chair: Gabriel Souza Ribeiro, IFSul, Brazil.
The Program started with an Opening Session including a brief history of SERESSA. The invited talks had
60 min. each, including questions. On Tuesday, December 1, the talks were:
The Effect of Space Weather on the Space Assets
Joaquim E. R. Costa, INPE (National Institute of Space
Research), Brazil
Effects of Radiation on Multijunction Solar Cells for
Space Application
José Ramón González, European Space Agency, The
Netherlands
Single Event Effects
Stephen Buchner, Naval Research Laboratory, Washington DC, USA
SEE Effects on VLSI Devices: Challenges and Solutions
Luca Sterpone, Politecnico de Torino, Italy
Circuit Level Design Methods to Mitigate Soft Errors
Ricardo Reis, UFRGS (Universidade Federal do Rio
Grande do Sul), Brazil.
The second day, December 2, included the following talks:
SEE test methods
Pavel Chubunov, URSC-ISDE, Russia
Error-rate Prediction for Programmable Circuits:
Methodology, Tools and Studied Cases
Raoul Velazco, TIMA, France
Accelerator Radiation Environment: Modeling and
Monitoring Tools and Approaches
Giuseppe Lerner, CERN (European Organization for
Nuclear Research), Switzerland
Brazilian Facilities and Case-studies
Marcilei Guazzelli da Silveira, Nilberto Heder Medina, Tiago Balen, Claudio Federio, FEI, Brazil/USP, Brazil/
IEAv, CTA, Brazil/UFRGS, Brazil
Hardness Assurance
Stephen Buchner, Naval Research Laboratory, Washington DC, USA
Assurance Guidelines for Next-Generation Exploration Systems
Jonathan Pellish, NASA, USA
Characterizing FPGA Failure Probabilities for Critical Space Systems
Melanie Berg, Space R2 LLC, USA.
On Thursday, December 3, the talks were:
COTS In Space: Qualified Commercial Components
for Space
Jaime Estela, Spectrum Aerospace Technologies, Munich, Germany
86

IEEE CIRCUITS AND SYSTEMS MAGAZINE

System Hardening and Real Space Applications
Michel Pignol, CNES, France
Fault Injection and Formal Verification Methodologies
Luis Alfonso Entrena Arrontes, Universidad Carlos III
de Madrid, Spain
Ionizing Radiation Effects on CMOS Image Sensors
José Lipovetzky, Centro Atómico Bariloche, CNEA,
Argentina
Analyzing the Reliability of Neural Networks in
Programmable SoC Devices
Fernanda Lima Kastensmidt, UFRGS (Universidade
Federal do Rio Grande do Sul), Brazil
The last session of the day was a poster one with 15
posters. The posters are still available in the webpage of
the school: www.ufrgs.br/seressa2020/ [1].
The last day, December 4, included the following talks:
Radiation Test Requirements for Functional Safety
Standards
Sung Chung, QRT, South Korea
Analyzing Data Extracted From Radiation Tests in
Advanced SRAMs
Juan A. Clemente, Universidad Complutense de Madrid, Spain
Transistor- and System-Level Approaches for Hardened-by-Design Silicon Integrated Circuits in Harsh
Radiation Environments
Yann Deval, IMS, University of Bordeaux, France
Routing in Fault-Prone Delay-Tolerant Networks
Juan A. Fraire, Universidad Nacional de Córdoba, Argentina and Universität Des Saarlandes, Germany
NanosatC-Br Program and Development of Radiation Hardened Integrated Circuits for Satellites
Applications
João Baptista Martins and Nelson Jorge Schuch,
UFSM/INPE, SM, Brazil
Radiation Effects and Mitigation Techniques
in GPU
Paolo Rech and José Rodrigo Azambuja, UFRGS, Brazil.

Figure 3. A screenshot of Yann Deval's talk at SERESSA.

FIRST QUARTER 2021
http://www.ufrgs.br/seressa2020/
IEEE Circuits and Systems Magazine - Q1 2021

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