IEEE Circuits and Systems Magazine - Q2 2021 - 4

Feature
FPGA Architecture:
Principles and Progression
Andrew Boutros and Vaughn Betz
Abstract
Since their inception more than thirty years ago, field-programmable
gate arrays (FPGAs) have been widely used to implement
a myriad of applications from different domains. As a result of
their low-level hardware reconfigurability, FPGAs have much
faster design cycles and lower development costs compared to
custom-designed chips. The design of an FPGA architecture involves
many different design choices starting from the high-level
architectural parameters down to the transistor-level implementation
details, with the goal of making a highly programmable
device while minimizing the area and performance cost of reconfigurability.
As the needs of applications and the capabilities of
process technology are constantly evolving, FPGA architecture
must also adapt. In this article, we review the evolution of the
different key components of modern commercial FPGA architectures
and shed the light on their main design principles and
implementation challenges.
I. Introduction
F
ield-programmable gate arrays (FPGAs) are reconfigurable
computer chips that can be programmed
to implement any digital hardware circuit. As depicted
in Fig. 1, FPGAs consist of an array of different
types of programmable blocks (logic, IO, and others) that
can be flexibly interconnected using pre-fabricated routing
tracks with programmable switches between them.
The functionality of all the FPGA blocks and the configuration
of the routing switches are controlled using
millions of static random access memory (SRAM) cells
that are programmed (i.e. written) at runtime to realize
a specific function. The user describes the desired functionality
in a hardware description language (HDL) such
as Verilog or VHDL, or possibly uses high-level synthesis
to translate C or OpenCL to HDL. The HDL design is then
compiled using a complex computer-aided design (CAD)
flow into the bitstream file used to program all the FPGA's
configuration SRAM cells.
Digital Object Identifier 10.1109/MCAS.2021.3071607
Date of current version: 24 May 2021
4
IEEE CIRCUITS AND SYSTEMS MAGAZINE
Compared to building a custom application-specific
integrated circuit (ASIC), FPGAs have a much lower nonrecurring
engineering cost and shorter time-to-market.
A pre-fabricated off-the-shelf FPGA can be used to implement
a complete system in a matter of weeks, skipping the
physical design, layout, fabrication, and verification stages
that a custom ASIC would normally go through. They
also allow continuous hardware upgrades to support new
features or fix bugs by simply loading a new bitstream after
deployment in-field, thus the name field-programmable.
1531-636X/21©2021IEEE
SECOND QUARTER 2021

IEEE Circuits and Systems Magazine - Q2 2021

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