IEEE Circuits and Systems Magazine - Q2 2021 - 47

[27] K. Kara, C. Hagleitner, D. Diamantopoulos, D. Syrivelis, and G. Alonso,
" High bandwidth memory on FPGAs: A data analytics perspective, "
2020. [Online]. Available: https://arxiv.org/abs/2004.01635
[28] K. Neshatpour et al., " Energy-efficient acceleration of MapReduce
applications using FPGAs, " J. Parallel Distrib. Comput., vol. 119, pp. 1-17,
2018. doi: 10.1016/j.jpdc.2018.02.004.
[29] J. Ragan-Kelley, C. Barnes, A. Adams, S. Paris, F. Durand, and S.
Amarasinghe, " Halide: A language and compiler for optimizing parallelism,
locality, and recomputation in image processing pipelines, " in
Proc. 34th ACM SIGPLAN Conf. Programming Language Des. Implementation,
2013, p. 519-530. doi: 10.1145/2491956.2462176.
[30] T. Chen et al., " TVM: An automated end-to-end optimizing compiler
for deep learning, " in Proc. 13th {USENIX} Symp. Operating Syst.
Des. Implementation ({OSDI} 18), 2018, pp. 578-594.
[31] B. Hagedorn, J. Lenfers, T. Koehler, S. Gorlatch, and M. Steuwer, " A
language for describing optimization strategies, " 2020. [Online]. Available:
https://arxiv.org/abs/2002.02268
[32] H. Rong, " Programmatic control of a compiler for generating highperformance
spatial hardware, " 2017. [Online]. Available: https://arxiv
.org/abs/1711.07606
[33] Y.-H. Lai et al., " HeteroCL: A multi-paradigm programming infrastructure
for software-defined reconfigurable computing, " in Proc. ACM/SIGDA
Int. Symp. Field-Programmable Gate Arrays (FPGA), 2019, pp. 242-251.
[34] M. Zaharia, " An architecture for fast and general data processing
on large clusters, " Ph.D. dissertation, Electrical Engineering and Computer
Sciences, Univ. of California at Berkeley, 2014.
[35] J. Peltenburg, J. van Straten, L. Wijtemans, L. van Leeuwen, Z. Al-Ars,
and P. Hofstee, " Fletcher: A framework to efficiently integrate FPGA accelerators
with Apache Arrow, " in Proc. 29th Int. Conf. Field Programmable
Logic and Appl. (FPL), Sept. 2019, pp. 270-277. doi: 10.1109/FPL.2019.00051.
[36] J. Peltenburg, J. van Straten, M. Brobbel, H. P. Hofstee, and Z. AlArs,
" Supporting columnar in-memory formats on FPGA: The hardware
design of Fletcher for Apache Arrow, " in Applied Reconfigurable Computing,
C. Hochberger, B. Nelson, A. Koch, R. Woods, and P. Diniz, Eds.
Cham: Springer International Publishing, 2019, pp. 32-47.
[37] J. Peltenburg, J. van Straten, M. Brobbel, Z. Al-Ars, and H. P. Hofstee,
" Tydi: An open specification for complex data structures over hardware
streams, " IEEE Micro, vol. 40, no. 4, July/August 2020. doi: 10.1109/
MM.2020.2996373.
[38] G. Zhong, A. Prakash, S. Wang, Y. Liang, T. Mitra, and S. Niar, " Design
Space exploration of FPGA-based accelerators with multi-level parallelism, "
in Proc. Des., Automat. Test Europe Conf. Exhib. (DATE), 2017, pp. 1141-1146.
[39] G. Deest, N. Estibals, T. Yuki, S. Derrien, and S. Rajopadhye, " Towards
Scalable and Efficient FPGA Stencil Accelerators, " in Proc.
IMPACT'16-6th Int. Workshop on Polyhedral Compilation Techn., held
with HIPEAC'16, Prague, Czech Republic, Jan. 2016. [Online]. Available:
https://hal.inria.fr/hal-01425018
[40] A. Hadnagy, " Dataflow hardware design for big data acceleration
using typed interfaces, " Master's thesis, Delft Univ. of Technology, 2020.
[Online]. Available: http://resolver.tudelft.nl/uuid:38d9b35e-2d75-4cab
-b6d1-723c2849badb
[41] " Chicago taxi trips, " Kaggle, 2020. [Online]. Available: https://www
.kaggle.com/chicago/chicago-taxi-trips-bq
[42] J. van Straten, " vhdre: a VHDL regex matcher generator, " 2019. [Online].
Available: https://github.com/abs-tudelft/vhdre
[43] J. Thomas, P. Hanrahan, and M. Zaharia, " Fleet: A framework for
massively parallel streaming on FPGAs, " in Proc. 25th Int. Conf. Arch.
Support Programming Languages and Operating Syst., 2020, p. 639-651.
doi: 10.1145/3373376.3378495.
[44] J. Korinth, J. Hofmann, C. Heinz, and A. Koch, " The TaPaSCo opensource
toolflow for the automated composition of task-based parallel
reconfigurable computing systems, " in Applied Reconfigurable Computing,
C. Hochberger, B. Nelson, A. Koch, R. Woods, and P. Diniz, Eds.
Cham: Springer International Publishing, 2019, pp. 214-229.
[45] L. Truong and P. Hanrahan, " A golden age of hardware description
languages: Applying programming language techniques to improve design
productivity, " Leibniz Int. Proc. Informatics, LIPIcs, vol. 136, no. 7,
pp. 1-7, 2019.
[46] " oneAPI programming model, " Intel. [Online]. Available: https://
www.oneapi.com/
[47] S.-H. Wang et al., " Pyrope, a modern HDL with a live flow. " [Online].
Available: https://masc.soe.ucsc.edu/pyrope.html
[48] J. Bachrach et al., " Chisel: Constructing hardware in a Scala embedded
language, " in Proc. DAC Des. Automat. Conf., June 2012, pp. 1212-1221.
SECOND QUARTER 2021
[49] R. Prabhakar et al., " Generating configurable hardware from parallel
patterns, " in Proc. Int. Conf. Arch. Support Programming Languages Operating
Syst.-ASPLOS, vol. 50, no. 2, pp. 651-665, 2016. doi: 10.1145/2954680.2872415.
[50] A. K. Sujeeth et al., " Delite: A compiler architecture for performanceoriented
embedded domain-specific languages, " ACM Trans. Embedded
Comput. Syst. (TECS), vol. 13, no. 4s, pp. 1-25, 2014. doi: 10.1145/2584665.
[51] F. Franchetti et al., " Spiral: Extreme performance portability, " Proc.
IEEE, vol. 106, no. 11, pp. 1935-1968, 2018. doi: 10.1109/JPROC.2018.2873289.
[52] M. Kristien, B. Bodin, M. Steuwer, and C. Dubach, " High-level synthesis
of functional patterns with lift, " in Proc. ACM SIGPLAN Conf. Programming
Language Des. Implementation (PLDI), 2019, pp. 35-45.
[53] R. Mueller, J. Teubner, and G. Alonso, " Glacier: A query-to-hardware
compiler, " in Proc. ACM SIGMOD Int. Conf. Management of Data,
2010, p. 1159-1162. doi: 10.1145/1807167.1807307.
[54] R. Mueller, J. Teubner, and G. Alonso, " Streams on wires: a query compiler
for FPGAs, " Proc. VLDB Endowment, vol. 2, no. 1, pp. 229-240, 2009.
[55] " PostgreSQL database acceleration innovators, " Swarm64. [Online].
Available: https://swarm64.com/
[56] P. Papaphilippou and W. Luk, " Accelerating database systems using
FPGAs: A survey, " in Proc. 28th Int. Conf. Field Programmable Logic and
Appl. (FPL), Aug. 2018, pp. 125-1255. doi: 10.1109/FPL.2018.00030.
[57] J. Fang, Y. T. Mulder, J. Hidders, J. Lee, and H. P. Hofstee, " In-memory
database acceleration on FPGAs: A survey, " VLDB J., vol. 29, no. 1,
pp. 33-59, 2020. doi: 10.1007/s00778-019-00581-w.
[58] " Kestrel runtime-Big data application scheduling and load balancing, "
Falcon Computing. [Online]. Available: https://www.falconcomputing
.com/falcon-kestrel-runtime/
[59] " MLlib-Apache Spark, " Apache Software Foundation. [Online].
Available: https://spark.apache.org/mllib/
[60] P. Li, Y. Luo, N. Zhang, and Y. Cao, " HeteroSpark: A heterogeneous
CPU/GPU Spark platform for machine learning algorithms, " in Proc.
IEEE Int. Conf. Netw., Arch. and Storage (NAS), 2015, pp. 347-348.
[61] R. Bordawekar, " Nvidia GTC Silicon Valley 2016: Accelerating Spark
workloads using GPUs, " 2016. [Online]. Available: https://on-demand
-gtc.gputechconf.com/gtcnew/sessionview.php?sessionName=s6280
-accelerating+spark+workloads+using+gpus
[62] R. Bordawekar, " Accelerating Spark workloads using GPUs, " Aug.
2016. [Online]. Available: https://www.oreilly.com/content/accelerating
-spark-workloads-using-gpus/
[63] J. L. Robert Evans, " Spark+AI Summit 2020: Deep dive into GPU support
in Apache Spark 3.x, " July 2020. [Online]. Available: https://databricks.com/
de/session_na20/deep-dive-into-gpu-support-in-apache-spark-3-x
[64] Spark RAPIDS plugin-Accelerate Apache Spark with GPUs, " NVIDIA,
2020. [Online]. Available: https://github.com/NVIDIA/spark-rapids
[65] " Open GPU data science, " RAPIDS. [Online]. Available: https://
rapids.ai/about.html
[66] " TensorFrames: Experimental tensorflow binding for Scala and
Apache Spark, " Databricks, Apr. 2017. [Online]. Available: https://
github.com/databricks/tensorframes
[67] Y. Yuan, M. F. Salmi, Y. Huai, K. Wang, R. Lee, and X. Zhang, " SparkGPU:
An accelerated in-memory data processing engine on clusters, "
in Proc. IEEE Int. Conf. Big Data (Big Data), Dec. 2016, pp. 273-283. doi:
10.1109/BigData.2016.7840613.
[68] M. Huang et al., " Programming and runtime support to blaze FPGA
accelerator deployment at datacenter scale, " in Proc. 7th ACM Symp.
Cloud Comput., 2016, pp. 456-469. doi: 10.1145/2987550.2987569.
[69] " Hyperacceleration with Bigstream technology, " Bigstream. [Online].
Available: https://blog.bigstream.co/resources/hyper-acceleration
-with-bigstream-technology
[70] " Spark Native SQL Engine-Optimized analytics package for Spark
platform, "
Intel, 2020.
[Online]. Available: https://github.com/Intel
-bigdata/OAP/tree/master/oap-native-sql
[71] W. C. Calvin Hung, " Spark+AI Summit 2020: Accelerating Spark SQL
workloads to 50X performance with Apache Arrow-based FPGA accelerators, "
2020. [Online]. Available: https://databricks.com/session
_na20/accelerating-spark-sql-workloads-to-50x-performance-with
-apache-arrow-based-fpga-accelerators
[72] A. Vaishnav, K. D. Pham, and D. Koch, " A survey on FPGA virtualization, "
in Proc. 28th Int. Conf. Field Programmable Logic and Appl. (FPL),
2018, pp. 131-1317. doi: 10.1109/FPL.2018.00031.
[73] Z. Al-Ars et al., " The FitOptiVis ECSEL project: Highly efficient
distributed embedded image/video processing in cyber-physical systems, "
in Proc. 16th ACM Int. Conf. Comput. Front., 2019, pp. 333-338.
[Online]. doi: 10.1145/3310273.3323437.
IEEE CIRCUITS AND SYSTEMS MAGAZINE
47

https://www.arxiv.org/abs/2004.01635 https://www.arxiv.org/abs/2002.02268 https://www.swarm64.com/ https://arxiv.org/abs/1711.07606 https://arxiv.org/abs/1711.07606 https://www.falconcomputing.com/falcon-kestrel-runtime/ https://www.falconcomputing.com/falcon-kestrel-runtime/ https://spark.apache.org/mllib/ https://on-demand -gtc.gputechconf.com/gtcnew/sessionview.php?sessionName=s6280-accelerating+spark+workloads+using+gpus https://on-demand -gtc.gputechconf.com/gtcnew/sessionview.php?sessionName=s6280-accelerating+spark+workloads+using+gpus https://on-demand -gtc.gputechconf.com/gtcnew/sessionview.php?sessionName=s6280-accelerating+spark+workloads+using+gpus https://www.oreilly.com/content/accelerating-spark-workloads-using-gpus/ https://www.oreilly.com/content/accelerating-spark-workloads-using-gpus/ https://databricks.com/de/session_na20/deep-dive-into-gpu-support-in-apache-spark-3-x https://databricks.com/de/session_na20/deep-dive-into-gpu-support-in-apache-spark-3-x https://www.github.com/NVIDIA/spark-rapids http://www.rapids.ai/about.html http://www.rapids.ai/about.html https://hal.inria.fr/hal-01425018 http://www.github.com/databricks/tensorframes http://www.github.com/databricks/tensorframes http://resolver.tudelft.nl/uuid:38d9b35e-2d75-4cab-b6d1-723c2849badb http://resolver.tudelft.nl/uuid:38d9b35e-2d75-4cab-b6d1-723c2849badb http://www.kaggle.com/chicago/chicago-taxi-trips-bq http://www.kaggle.com/chicago/chicago-taxi-trips-bq https://www.github.com/abs-tudelft/vhdre https://blog.bigstream.co/resources/hyper-acceleration-with-bigstream-technolog https://blog.bigstream.co/resources/hyper-acceleration-with-bigstream-technolog https://github.com/Intel-bigdata/OAP/tree/master/oap-native-sql https://github.com/Intel-bigdata/OAP/tree/master/oap-native-sql https://on-demand-gtc.gputechconf.com/gtcnew/sessionview.php?sessionName=s6280-accelerating+spark+workloads+using+gpus https://on-demand-gtc.gputechconf.com/gtcnew/sessionview.php?sessionName=s6280-accelerating+spark+workloads+using+gpus https://on-demand-gtc.gputechconf.com/gtcnew/sessionview.php?sessionName=s6280-accelerating+spark+workloads+using+gpus http://www.oneapi.com/ http://www.oneapi.com/ https://masc.soe.ucsc.edu/pyrope.html

IEEE Circuits and Systems Magazine - Q2 2021

Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q2 2021