IEEE Circuits and Systems Magazine - Q3 2021 - 10

Furthermore, at lower supply voltages, CNTFET based
logic gates have exhibited lower leakage power compared
to CMOS technology [63].
Nevertheless, the CNT is impossible to guarantee perfect
alignment leading to performance variations. The
main CNT variations include chirality, diameter, growth
density, alignment, and doping concentration [64]-[65].
These variations correlate with one another, result in
electrical property dissimilarity, and can lead to malfunction
of digital circuits in the worst case. These inherent
carbon nanotube variations have been exploited in the
design of compact PUF [64]. Additionally, the lower leakage
characteristics of CNTFET helped in enhancing DPA
resilience compared to CMOS technology [66].
D. PCM process Variations and
Programming Sensitivity
Phase change memory (PCM) is capable of storing one
bit information that exploits variation in electrical resistance
of phase change material [45]. PCM cell consists
of two electrodes, a heater element, and a phase change
device (phase change device typically a chalcogenide
material) as shown in Fig. 7(a). The top electrode is connected
to the bit line, the bottom electrode is connected
to the access transistor. The storage device can be programmed
to either a low resistance crystalline phase or
a high resistance amorphous phase that represents a
logic " 1 " (SET) or logic " 0 " (RESET), respectively. The
heater element provides the required temperature upon
applying electrical pulses for programming a cell. PCM
can be operated in three different configurations namely
SET, RESET, and READ. To change the state of the
PCM cell, different heat-profiles are applied. Figure 7(b)
shows the programming current pulses of different
magnitudes and duration that increases/decreases the
temperature of the storage material to change the state.
For the SET operation (storage material changes from
an amorphous state to the polycrystalline state), a current
pulse of longer duration with lower strength is applied.
On the other hand, the PCM cell is RESET (storage
material changes from polycrystalline state to the amorphous
state) upon applying a current pulse of shorter
duration with higher strength.
However, due to the fabrication process variations,
Doped CNT
Undoped CNT
S
G
High-k Dielectric
CNT
Insulator
(a)
n3
n3>n2>n1
n2
n1
n1
n3>n2>n1
n2
VGS(V)
(b)
Figure 6. CNTFET (a) Device structure (b) ID-VGS and ID-VDS characteristics.
10
IEEE CIRCUITS AND SYSTEMS MAGAZINE
VDS(V)
E. RRAM Variation
in Resistance
Resistive RAM (RRAM) is an emerging
nonvolatile memory candidate
and it contains a metal oxide sandwiched
between two metal electrodes
(top electrode and bottom
electrode) as shown in Fig. 8(a)
[46]. RRAM switching is mainly due
to oxide breakdown and re-oxidation.
RRAM exhibits two switching
THIRD QUARTER 2021
the electrical characteristics of the PCM cell deviate
from die-to-die and even within the die. Several geometrical
variations of storage material (that include storage
layer thickness, heater thickness, a bottom electrode,
and contact diameter), electrical and thermal conductivities
are responsible for process variations [67]. These
variations cause the differences in amorphization and
crystallization rates that result in a random distribution
of programmed cell resistances. It reveals that the programmed
resistance of the PCM cell is sensitive to process
variations. Moreover, the variations in the amplitude,
rise/fall time, and the time duration of the program
pulse cause the difference in temperature
profile thereby impacting
storage material amorphization/
crystallization [55]. It causes variations
in PCM cell resistance and is
named programming sensitivity.
Both process variations and programming
sensitivity of the PCM
cell have been explored in PUF design
[68]. Moreover, the PCM has
been demonstrated as a tampering
detector by exploring variation in
cell resistance [69].
D
n3
ID(µA)
ID(µA)
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