IEEE Circuits and Systems Magazine - Q3 2021 - 31
Feature
©SHUTTERSTOCK.COM/PDUSIT
Compute-in-Memory Chips
for Deep Learning: Recent
Trends and Prospects
Shimeng Yu, Hongwu Jiang, Shanshi Huang, Xiaochen Peng, and Anni Lu
Abstract
Compute-in-memory (CIM) is a new computing paradigm that
addresses the memory-wall problem in hardware accelerator
design for deep learning. The input vector and weight matrix
multiplication,
i.e., the multiply-and-accumulate (MAC) operation,
could be performed in the analog domain within memory
sub-array,
leading to significant
Digital Object Identifier 10.1109/MCAS.2021.3092533
Date of current version: 12 August 2021
THIRD QUARTER 2021
1531-636X/21©2021IEEE
improvements in throughput
and energy efficiency. Static random access memory (SRAM)
and emerging non-volatile memories such as resistive random
access memory (RRAM) are promising candidates to store the
weights of deep neural network (DNN) models. In this review,
firstly we survey the recent progresses in SRAM and RRAM
based CIM macros that have been demonstrated in silicon. Then
we discuss general design challenges of the CIM chips including
analog-to-digital conversion (ADC) bottleneck, variations in analog
compute, and device non-idealities. Next we introduce the
DNN+NeuroSim benchmark framework that is capable of evaluating
versatile device technologies for CIM inference and training
performance from software/hardware co-design's perspective.
IEEE CIRCUITS AND SYSTEMS MAGAZINE
31
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IEEE Circuits and Systems Magazine - Q3 2021
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