IEEE Circuits and Systems Magazine - Q3 2021 - 54

References
[1] Y. LeCun, Y. Bengio, G. Hinton, " Deep learning, " Nature, vol. 521, pp.
436-444, 2015. doi: 10.1038/nature14539.
[2] N. P. Jouppi et al., " In-datacenter performance analysis of a tensor
processing unit, " in Proc. ACM/IEEE Int. Symp. Comput. Arch. (ISCA), 2017.
[3] V. Sze, Y.-H. Chen, T.-J. Yang, J. S. Emer, " Efficient processing of deep
neural networks: A tutorial and survey, " Proc. IEEE, vol. 105, no. 12, pp.
2295-2329, 2017. doi: 10.1109/JPROC.2017.2761740.
[4] D. Ielmini and H.-S. P. Wong, " In-memory computing with resistive
switching devices, " Nat. Electron., vol. 1, no. 6, pp. 333-343, 2018. doi:
10.1038/s41928-018-0092-2.
[5] L. Deng, G. Li, S. Han, L. Shi, and Y. Xie, " Model compression
and hardware acceleration for neural networks: A comprehensive
survey, " Proc. IEEE, vol. 108, no. 4, pp. 485-532, 2020. doi: 10.1109/
JPROC.2020.2976475.
[6] S. Yu and P.-Y. Chen, " Emerging memory technologies: Recent trends
and prospects, " IEEE Solid State Circuits Mag., vol. 8, no. 2, pp. 43-56,
2016. doi: 10.1109/MSSC.2016.2546199.
[7] S. Yu, " Neuro-inspired computing with emerging non-volatile
memory, " Proc. IEEE, vol. 106, no. 2, pp. 260-285, 2018. doi: 10.1109/
JPROC.2018.2790840.
[8] A. Sebastian, M. L. Gallo, R. Khaddam-Aljameh, E. Eleftheriou,
" Memory devices and applications for in-memory computing, " Nat.
Nanotechnol., vol. 15, pp. 529-544, 2020. doi: 10.1038/s41565-0200655-z.
[9]
T. Gokmen and Y. Vlasov, " Acceleration of deep neural network training
with resistive cross-point devices: design considerations, " Front.
Neurosci., vol. 10, no. 333, pp. 1-13, 2016. doi: 10.3389/fnins.2016.00333.
[10] L. Gao et al., " Fully parallel write/read in resistive synaptic array for accelerating
on-chip learning, " Nanotechnology, vol. 26, no. 45, p. 455204, 2015.
[11] F. Alibart, L. Gao, B. D. Hoskins, and D. B. Strukov, " High precision
tuning of state for memristive devices by adaptable variation-tolerant
algorithm, " Nanotechnology, vol. 23, p. 075201, 2012.
[12] L. Gao, P.-Y. Chen, and S. Yu, " Programming protocol optimization
for analog weight tuning in resistive memories, " IEEE Electron Device
Lett., vol. 36, no. 11, pp. 1157-1159, 2015.
[13] Y.-H. Chen, T. Krishna, J. S. Emer, and V. Sze, " Eyeriss: An energyefficient
reconfigurable accelerator for deep convolutional neural networks, "
in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), 2016.
[14] B. Moons, R. Uytterhoeven, W. Dehaene, and M. Verhelst, " Envision:
A 0.26-to-10TOPS/W subword-parallel dynamic-voltage-accuracyfrequency-scalable
convolutional neural network processor in 28nm
FDSOI, " IEEE Int. Solid-State Circuit Conf. (ISSCC), 2017.
[15] J. Lee, C. Kim, S. Kang, D. Shin, S. Kim, and H. J. Yoo, " UNPU: A 50.6
TOPS/W unified deep neural network accelerator with 1b-to-16b fullyvariable
weight bit-precision, " in Proc. IEEE Int. Solid-State Circuits Conf.
(ISSCC), 2018.
[16] X. Sun et al., " Low-VDD operation of SRAM synaptic array for implementing
ternary neural network, " IEEE Trans. VLSI Syst., vol. 25, no. 10,
pp. 2962-2965, 2017. doi: 10.1109/TVLSI.2017.2727528.
[17] X. Peng et al., " Inference engine benchmarking across technological
platforms from CMOS to RRAM, " in Proc. ACM Int. Symp. Memory
Syst. (MEMSYS), 2019. doi: 10.1145/3357526.3357566.
[18] D. Zhang, N. Jayasena, A. Lyashevsky, J. L. Greathouse, L. Xu, and
M. Ignatowski, " TOP-PIM: Throughput-oriented programmable processing
in memory, " in Proc. ACM Int. Symp. High-Performance Parallel
Distrib. Comput. (HPDC), 2014.
[19] F. Gao, G. Tziantzioulis, D. Wentzlaff, " ComputeDRAM: In-memory
compute using off-the-shelf DRAMs, " in Proc. ACM/IEEE Int. Symp. Microarchitecture
(MICRO), 2019.
[20] H.-T. Lue et al., " Optimal design methods to transform 3D NAND
flash into a high-density, high-bandwidth and low-power nonvolatile
computing in memory (nvCIM) accelerator for deep-learning neural networks
(DNN), " in Proc. IEEE Int. Electron Devices Meeting (IEDM), 2019.
[21] J. Draper et al., " The architecture of the DIVA processing-inmemory
chip, " in Proc. ACM Int. Conf. Supercomput. (ISC), 2002. doi:
10.1145/514191.514197.
[22] G. Yeap et al., " 5nm CMOS production technology platform featuring
full-fledged EUV, and high mobility channel FinFETs with densest
0.021um2 SRAM cells for mobile SoC and high performance computing
applications, " in Proc. IEEE Int. Electron Devices Meeting (IEDM), 2019.
[23] F. Tu, W. Wu, S. Yin, L. Liu, and S. Wei, " RANA: Towards efficient
neural acceleration with refresh-optimized embedded DRAM, " in Proc.
ACM/IEEE Int. Symp. Comput. Arch. (ISCA), 2018.
54
IEEE CIRCUITS AND SYSTEMS MAGAZINE
[24] F. Hamzaoglu et al., " A 1Gb 2GHz embedded DRAM in 22nm tri-gate
CMOS technology, " in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), 2014.
[25] C. Berry et al., " IBM z15: A 12-Core 5.2 GHz Microprocessor, " in
Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), 2020.
[26] T. Yoo, H. Kim, Q. Chen, T.-H. Kim, and B. Kim, " A logic compatible
4T dual embedded DRAM array for in-memory computation of deep
neural networks, " in Proc. ACM/IEEE Int. Symp. Low Power Electron. Des.
(ISLPED), 2019.
[27] Y. Li et al., " Capacitor-based cross-point array for analog neural network
with record symmetry and linearity, " in Proc. IEEE Symp. VLSI Technol.,
2018.
[28] Y. Chen, " ReRAM: History, status, and future, " IEEE Trans. Electron
Devices, vol. 67, no. 4, pp. 1420-1433, 2020. doi: 10.1109/TED.2019.2961505.
[29] T. Kim and S. Lee, " Evolution of phase-change memory for the storage-class
memory and beyond, " IEEE Trans. Electron Devices, vol. 67,
no. 4, pp. 1394-1406, 2020. doi: 10.1109/TED.2020.2964640.
[30] S. Ikegawa, F.B. Mancoff, J. Janesky, and S. Aggarwal, " Magnetoresistive
random access memory: Present and future, " IEEE Trans. Electron
Devices, vol. 67, no. 4, pp. 1407-1419, 2020. doi: 10.1109/TED.2020.2965403.
[31] K. Garello, F. Yasin, and G. S. Kar, " Spin-orbit torque MRAM for ultrafast
embedded memories: From fundamentals to large scale technology
integration, " in Proc. IEEE Int. Memory Workshop (IMW), 2019.
[32] T. Mikolajick, U. Schroeder, and S. Slesazeck, " The past, the present,
and the future of ferroelectric memories, " IEEE Trans. Electron Devices,
vol. 67, no. 4, pp. 1434-1443, 2020. doi: 10.1109/TED.2020.2976148.
[33] J. Tang et al., " ECRAM as scalable synaptic cell for high-speed, lowpower
neuromorphic computing, " in Proc. IEEE Int. Electron Devices Meeting
(IEDM), 2018.
[34] C.-C. Chou et al., " An N40 256K×44 embedded RRAM macro with SLprecharge
SA and low-voltage current limiter to improve read and write
performance, " in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), 2018.
[35] C.-F. Yang et al., " Industrially applicable read disturb model and
performance on Mega-bit 28nm embedded RRAM, " in Proc. IEEE Symp.
VLSI Technol., 2020.
[36] C.-C. Chou et al., " A 22nm 96K×144 RRAM macro with a self-tracking
reference and a low ripple charge pump to achieve a configurable read
window and a wide operating voltage range, " in Proc. IEEE Symp. VLSI
Circuits, 2020.
[37] P. Jain et al., " A 3.6 Mb 10.1 Mb/mm2 embedded non-volatile ReRAM
macro in 22nm FinFET technology with adaptive forming/set/reset
schemes yielding down to 0.5 V with sensing time of 5ns at 0.7 V, " in Proc.
IEEE Int. Solid-State Circuits Conf. (ISSCC), 2019.
[38] J.-Y. Wu et al., " A 40nm low-power logic compatible phase change memory
technology, " in Proc. IEEE Int. Electron Devices Meeting (IEDM), 2018.
[39] F. Arnaud et al., " Truly innovative 28nm FDSOI technology for automotive
micro-controller applications embedding 16MB Phase change
memory, " in Proc. IEEE Int. Electron Devices Meeting (IEDM), 2018.
[40] Y.-D. Chih et al., " A 22nm 32Mb embedded STT-MRAM with 10ns
read speed, 1M cycle write endurance, 10 years retention at 150° C and
high immunity to magnetic field interference, " in Proc. IEEE Int. SolidState
Circuits Conf. (ISSCC), 2020.
[41] L. Wei et al., " A 7Mb STT-MRAM in 22FFL FinFET technology with 4ns read
sensing time at 0.9V using write-verify-write scheme and offset-cancellation
sensing technique, " in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), 2019.
[42] V. B. Naik et al., " Manufacturable 22nm FD-SOI embedded MRAM
technology for industrial-grade MCU and IoT applications, " in Proc.
IEEE Int. Electron Devices Meeting (IEDM), 2019.
[43] Y.-J. Song et al., " Demonstration of highly manufacturable STT-MRAM
embedded in 28nm logic, " in Proc. IEEE Int. Electron Devices Meeting
(IEDM), 2018.
[44] M. Trentzsch et al., " A 28nm HKMG super low power embedded
NVM technology based on ferroelectric FETs, " in Proc. IEEE Int. Electron
Devices Meeting (IEDM), 2016.
[45] S. Dunkel et al., " A FeFET based super-low-power ultra-fast embedded
NVM technology for 22nm FDSOI and beyond, " in Proc. IEEE Int.
Electron Devices Meeting (IEDM), 2017.
[46] P. Yao et al., " Fully hardware-implemented memristor convolutional
neural network, " Nature, vol. 577, no. 7792, pp. 641-646, 2020.
[47] W. Kim et al., " Confined PCM-based analog synaptic devices offering
low resistance-drift and 1000 programmable states for deep learning, "
in Proc. IEEE Symp. VLSI Technol., 2019.
[48] M. Courbariaux, Y. Bengio, and J. P. David, " BinaryConnect: Training
deep neural networks with binary weights during propagations, " in
Proc. Adv. Neural Inf. Process. Syst. (NIPS), 2015.
THIRD QUARTER 2021

IEEE Circuits and Systems Magazine - Q3 2021

Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q3 2021

Contents
IEEE Circuits and Systems Magazine - Q3 2021 - Cover1
IEEE Circuits and Systems Magazine - Q3 2021 - Cover2
IEEE Circuits and Systems Magazine - Q3 2021 - Contents
IEEE Circuits and Systems Magazine - Q3 2021 - 2
IEEE Circuits and Systems Magazine - Q3 2021 - 3
IEEE Circuits and Systems Magazine - Q3 2021 - 4
IEEE Circuits and Systems Magazine - Q3 2021 - 5
IEEE Circuits and Systems Magazine - Q3 2021 - 6
IEEE Circuits and Systems Magazine - Q3 2021 - 7
IEEE Circuits and Systems Magazine - Q3 2021 - 8
IEEE Circuits and Systems Magazine - Q3 2021 - 9
IEEE Circuits and Systems Magazine - Q3 2021 - 10
IEEE Circuits and Systems Magazine - Q3 2021 - 11
IEEE Circuits and Systems Magazine - Q3 2021 - 12
IEEE Circuits and Systems Magazine - Q3 2021 - 13
IEEE Circuits and Systems Magazine - Q3 2021 - 14
IEEE Circuits and Systems Magazine - Q3 2021 - 15
IEEE Circuits and Systems Magazine - Q3 2021 - 16
IEEE Circuits and Systems Magazine - Q3 2021 - 17
IEEE Circuits and Systems Magazine - Q3 2021 - 18
IEEE Circuits and Systems Magazine - Q3 2021 - 19
IEEE Circuits and Systems Magazine - Q3 2021 - 20
IEEE Circuits and Systems Magazine - Q3 2021 - 21
IEEE Circuits and Systems Magazine - Q3 2021 - 22
IEEE Circuits and Systems Magazine - Q3 2021 - 23
IEEE Circuits and Systems Magazine - Q3 2021 - 24
IEEE Circuits and Systems Magazine - Q3 2021 - 25
IEEE Circuits and Systems Magazine - Q3 2021 - 26
IEEE Circuits and Systems Magazine - Q3 2021 - 27
IEEE Circuits and Systems Magazine - Q3 2021 - 28
IEEE Circuits and Systems Magazine - Q3 2021 - 29
IEEE Circuits and Systems Magazine - Q3 2021 - 30
IEEE Circuits and Systems Magazine - Q3 2021 - 31
IEEE Circuits and Systems Magazine - Q3 2021 - 32
IEEE Circuits and Systems Magazine - Q3 2021 - 33
IEEE Circuits and Systems Magazine - Q3 2021 - 34
IEEE Circuits and Systems Magazine - Q3 2021 - 35
IEEE Circuits and Systems Magazine - Q3 2021 - 36
IEEE Circuits and Systems Magazine - Q3 2021 - 37
IEEE Circuits and Systems Magazine - Q3 2021 - 38
IEEE Circuits and Systems Magazine - Q3 2021 - 39
IEEE Circuits and Systems Magazine - Q3 2021 - 40
IEEE Circuits and Systems Magazine - Q3 2021 - 41
IEEE Circuits and Systems Magazine - Q3 2021 - 42
IEEE Circuits and Systems Magazine - Q3 2021 - 43
IEEE Circuits and Systems Magazine - Q3 2021 - 44
IEEE Circuits and Systems Magazine - Q3 2021 - 45
IEEE Circuits and Systems Magazine - Q3 2021 - 46
IEEE Circuits and Systems Magazine - Q3 2021 - 47
IEEE Circuits and Systems Magazine - Q3 2021 - 48
IEEE Circuits and Systems Magazine - Q3 2021 - 49
IEEE Circuits and Systems Magazine - Q3 2021 - 50
IEEE Circuits and Systems Magazine - Q3 2021 - 51
IEEE Circuits and Systems Magazine - Q3 2021 - 52
IEEE Circuits and Systems Magazine - Q3 2021 - 53
IEEE Circuits and Systems Magazine - Q3 2021 - 54
IEEE Circuits and Systems Magazine - Q3 2021 - 55
IEEE Circuits and Systems Magazine - Q3 2021 - 56
IEEE Circuits and Systems Magazine - Q3 2021 - 57
IEEE Circuits and Systems Magazine - Q3 2021 - 58
IEEE Circuits and Systems Magazine - Q3 2021 - 59
IEEE Circuits and Systems Magazine - Q3 2021 - 60
IEEE Circuits and Systems Magazine - Q3 2021 - 61
IEEE Circuits and Systems Magazine - Q3 2021 - 62
IEEE Circuits and Systems Magazine - Q3 2021 - 63
IEEE Circuits and Systems Magazine - Q3 2021 - 64
IEEE Circuits and Systems Magazine - Q3 2021 - 65
IEEE Circuits and Systems Magazine - Q3 2021 - 66
IEEE Circuits and Systems Magazine - Q3 2021 - 67
IEEE Circuits and Systems Magazine - Q3 2021 - 68
IEEE Circuits and Systems Magazine - Q3 2021 - 69
IEEE Circuits and Systems Magazine - Q3 2021 - 70
IEEE Circuits and Systems Magazine - Q3 2021 - 71
IEEE Circuits and Systems Magazine - Q3 2021 - 72
IEEE Circuits and Systems Magazine - Q3 2021 - 73
IEEE Circuits and Systems Magazine - Q3 2021 - 74
IEEE Circuits and Systems Magazine - Q3 2021 - 75
IEEE Circuits and Systems Magazine - Q3 2021 - 76
IEEE Circuits and Systems Magazine - Q3 2021 - 77
IEEE Circuits and Systems Magazine - Q3 2021 - 78
IEEE Circuits and Systems Magazine - Q3 2021 - 79
IEEE Circuits and Systems Magazine - Q3 2021 - 80
IEEE Circuits and Systems Magazine - Q3 2021 - 81
IEEE Circuits and Systems Magazine - Q3 2021 - 82
IEEE Circuits and Systems Magazine - Q3 2021 - 83
IEEE Circuits and Systems Magazine - Q3 2021 - 84
IEEE Circuits and Systems Magazine - Q3 2021 - 85
IEEE Circuits and Systems Magazine - Q3 2021 - 86
IEEE Circuits and Systems Magazine - Q3 2021 - 87
IEEE Circuits and Systems Magazine - Q3 2021 - 88
IEEE Circuits and Systems Magazine - Q3 2021 - 89
IEEE Circuits and Systems Magazine - Q3 2021 - 90
IEEE Circuits and Systems Magazine - Q3 2021 - 91
IEEE Circuits and Systems Magazine - Q3 2021 - 92
IEEE Circuits and Systems Magazine - Q3 2021 - 93
IEEE Circuits and Systems Magazine - Q3 2021 - 94
IEEE Circuits and Systems Magazine - Q3 2021 - 95
IEEE Circuits and Systems Magazine - Q3 2021 - 96
IEEE Circuits and Systems Magazine - Q3 2021 - Cover3
IEEE Circuits and Systems Magazine - Q3 2021 - Cover4
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2023Q3
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2023Q2
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2023Q1
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2022Q4
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2022Q3
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2022Q2
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2022Q1
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2021Q4
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2021q3
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2021q2
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2021q1
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2020q4
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2020q3
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2020q2
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2020q1
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2019q4
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2019q3
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2019q2
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2019q1
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2018q4
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2018q3
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2018q2
https://www.nxtbook.com/nxtbooks/ieee/circuitsandsystems_2018q1
https://www.nxtbookmedia.com