IEEE Circuits and Systems Magazine - Q3 2021 - 68

Figure 2. U=RIsolve examples section with an instant analysis feature (further circuit examples will be added ahead).
enables its use in laptop/desktop personal computers,
tablets and smartphones, being agnostic to the underlying
hardware and operating system. As represented on
the Step 2 (Fig. 1), U=RIsolve's interface allows users to
upload both netlist and circuit image, analyse the circuit
and output the solution.
An instructions section is available, containing a
demo video and a slideshow addressing every step.
There are also some built-in circuit examples (Fig. 2)
ordered by complexity, including the circuit schematic
and a brief description of the circuit.
The execution of the NVM analysis returns a stepby-step
solution organised in multiple sections (maximum
of 9, depending on the circuit), as follows (see
Fig. 3):
1) Circuit Schematics: This section presents the uploaded
circuit image. In case the image file is not provided,
this part of the output is hidden, however, an embedded
schematics in the solution avoids users to check
it on the QUCS simulator.
2) Fundamental Variables: This subdivision displays
the necessary variables to calculate the number of equations
needed to solve the circuit trough the NVM, i.e.
the number of branches, nodes, IVS and the computed
number of equations.
3) Circuit Information: The circuit information section
gives details about the circuit, in particular the
AC frequency, the number of current sources (that will
help students to realise how many Branch currents are
known a priori) and ammeters, as well as the simulation
type (AC or DC).
68
IEEE CIRCUITS AND SYSTEMS MAGAZINE
4) Supernodes: The U=RIsolve algorithm uses its an
adapted version of the Supernodal Approach [15] to deal
with IVS3. This methodology allows to apply and output circuit
theory at every stage of the analysis process, which
has been considered of great importance [16]. This section
provides a description for each Floating Supernode (without
any node referenced to Ground) and Grounded Supernode
(with one of its nodes connected to Ground). In case
no IVS are found, this part of the output is hidden.
5) Branch Currents: This section outputs all currents,
the components each current flows through, and their
direction (from node X to node Y). U=RIsolve allows users
predefine Branch Currents ID and direction (of flow)
through the use of Ammeters. Otherwise, if Ammeters
are not used, currents' ID and direction are generated
automatically.
6) Equivalent Impedances and Voltages: This section's
purpose is to indicate users that the program found one
or more simplifications that could have been applied to
the circuit under analysis, such as in-series Resistors
(equivalent impedances) or in-series voltage sources
(equivalent voltages) in the same Branch.
7) KCL Currents Equations: This section outputs the
KCL equation for all nodes, including an illustration of
the currents flowing in and out of each node in order to
grant users a better perception of the equations system.
8) Equations System: This section explains how to
create the equation system from the previous KCL
3For a deeper technical detail on the algorithm and application please
refer to [12], available in the website's " Documents " section.
THIRD QUARTER 2021

IEEE Circuits and Systems Magazine - Q3 2021

Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q3 2021