IEEE Circuits and Systems Magazine - Q2 2022 - 6

Feature
Neuromorphic Computing:
Models and Hardware
A Survey on
Amar Shrestha, Haowen Fang, Zaidao Mei,
Daniel Patrick Rider, Qing Wu, and Qinru Qiu
©SHUTTERSTOCK.COM/SUPERSTAR
Abstract
The explosion of " big data " applications imposes severe challenges
of speed and scalability on traditional computer systems.
As the performance of
traditional Von Neumann machines is
greatly hindered by the increasing performance gap between
CPU and memory ( " known as the memory wall " ), neuromorphic
computing systems have gained considerable attention. The
biology-plausible computing paradigm carries out computing
by emulating the charging/discharging process of neuron and
synapse potential. The unique spike domain information encoding
enables asynchronous event driven computation and communication,
and hence has the potential for very high energy
efficiency. This survey reviews computing models and hardware
Digital Object Identifier 10.1109/MCAS.2022.3166331
Date of current version: 26 May 2022
6
IEEE CIRCUITS AND SYSTEMS MAGAZINE
platforms of existing neuromorphic computing systems. Neuron
and synapse models are first introduced, followed by the discussion
on how they will affect hardware design. Case studies of
several representative hardware platforms, including their architecture
and software ecosystems, are further presented. Lastly
we present several future research directions.
I. Introduction
T
he ever-increasing scale and computation complexity
of machine intelligence have been posing
challenges on the traditional Von Neumann architecture
and demanding for higher performance per watt
efficiency from energy limited systems such as edge devices,
Internet-of-Things (IOT), and cyber physical systems
(CPS). This motivates a new paradigm of massively
1531-636X/22©2022IEEE
SECOND QUARTER 2022

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IEEE Circuits and Systems Magazine - Q2 2022

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