IEEE Circuits and Systems Magazine - Q4 2022 - 31

Importantly, the above principle holds whether or
not the distributions of conductance states within a cell
overlap. To minimize the error in the dot product, the
absolute width of the distribution ∆G is more important,
and this quantity is not improved by ensuring that the
utilized states are well separated. Therefore, bit slicing
does not provide a fundamental advantage to accuracy
compared to approximate memories, and conversely, it
cannot be relied upon to save the accuracy when memory
cells with inherently large errors are used. Many of
the works listed in Table 1 choose to use bit slicing without
evaluating the accuracy with unsliced weights, with
the implicit assumption that the accuracy would fall significantly
without bit slicing. In Section 5, we show that
bit slicing does not in fact provide a large advantage to
accuracy for the same device conductance precision.
Bit slicing can nonetheless provide a small improvement
to accuracy, as will be explained in Sections 5.2
and 5.3. The origin of this benefit is subtle and does not
stem from having well-separated memory states. Since
the benefit tends to be small, it must be considered carefully
against the large energy and area overheads of bit
slicing, as shown in Section 9.
If the accumulated dot product error can be reduced
below the least significant bit (LSB) of the ADC, its propagation
to the next layer can be suppressed. This can be
achieved by using smaller arrays [43], [66], but this is
inefficient as it amortizes the ADC energy cost over
fewer MACs. Error correcting codes can correct a fraction
of the dot product errors [19], but the simplest and
least costly method of reducing these errors is to proportionally
map weights to conductances.
3.2. Proportional Mapping Reduces Errors
3.2.1. Weight Proportionality
A very common property of neural networks is the abundance
of low-valued or zero-valued weights. This is illustrated
in the weight value distributions shown in Fig.
4 of four popular ImageNet neural networks. In digital
inference accelerators, this property can be exploited to
greatly compress the network size (via pruning) and the
resultant sparsity can be used to save computation [25],
[26]. Pruning is more difficult to exploit in analog accelerators,
due to the rigid structure of a memory crossbar
[62]. Nonetheless, it is possible to exploit zero and
small-valued weights in analog accelerators by using
proportional mapping: a linear relationship between
numerical values in the algorithm and the physical
quantities in the analog hardware.
With proportional mapping, weight values are
mapped to conductances in proportion to their magnitude.
This is implemented by using differential cells
fourth quartEr 2022
Figure 3. accumulation of cell errors along a bit line. the
distribution center represents the correct value.
to encode negative weights in the manner described in
Section 2.3, and by using cells with high On/Off ratio
(Gmax/Gmin). Together with the strongly zero-peaked
weight distributions in neural networks, proportional
mapping can reduce the average cell conductance by
orders of magnitude, as shown in Section 4.3.
Reduction of the average conductance is important
because two types of analog errors tend to increase
proportionally with conductance or current. First, the
cell programming error ∆G typically increases with the
programmed conductance G, as will be described in
Section 5. For some technologies, like flash memory,
this is a fundamental property of the device. Another
source of error that increases with cell conductance
is parasitic voltage drops across the columns and/or
rows of the array, which nonuniformly distort the elements
of a weight matrix as described in Section 8.
Proportional mapping mitigates both of these errors,
by matching the least-error conductance states to the
most-used weight values.
3.2.2. Dot Product Proportionality
Proportional mapping is also important between dot
products and analog outputs. Neural networks natively
possess some tolerance to low-resolution activations
Figure 4. Weight value distributions of several popular
Imagenet neural networks.
IEEE cIrcuIts and systEms magazInE
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