IEEE Circuits and Systems Magazine - Q2 2023 - 44

Time-domain processing circuits are based on logic gates and thus
it can potentially provide better technology scaling as well
as synthesizable analog FEx.
circuit is more robust over process variation because it
is difficult to match different transistor types especially
in regards to the shallow trench isolation (STI) and well
proximity effect (WPE) [52]. The type-II FVF-based BPF
was implemented as a parallel audio FEx for a VAD integrated
circuit (IC) in [15].
VI. Summary and Outlook
Table I summarizes the audio feature extractor (FEx)
ICs reported for edge artificial intelligence (AI) tasks
such as VAD and KWS. In this table, we only compare
those FEx ICs that were validated with fabricated chip
measurements but there are other reported FEx designs
that could also be useful for the edge AI tasks. To date,
both analog and digital FExs have been used in audio
edge devices. An analog FEx can be categorized as a
CT or discrete-time (DT) filter while a CT filter can be
designed using voltage-domain or time-domain circuits.
Here, the Time-Domain means the signals are processed
using pulse-width modulation (PWM) or pulse frequency
modulation (PFM)-based circuits. Note that it is still
a CT signal which is not sampled by a clock running at
a known frequency. For instance, a time-to-digital converter
(TDC), which is widely used in phase-locked
loops (PLLs) [58] and time-of-flight (ToF) [59] sensors,
converts an Analog time-domain PWM input signal into
a sampled and quantized Digital output.
The CT voltage-domain filter discussed in Section
IV-B is combined with a rectifier and a spike generation
stage to form a cochlea channel leading to the
multi-channel Dynamic Audio Sensor (DAS) silicon
cochlea [5]. This design has been used in applications
such as sound source localization [60], [61] using the
spike timing of the binaural spikes from the DAS. It
was also used for multi-modal recognition [62], [63],
and keyword spotting using deep neural networks
(DNNs) [29], [64]. The latest CT voltage-domain filter
circuits show sub- µW ultra-low-power consumption
[13], [14], [15], [17], [35], by mainly exploiting the outstanding
power efficiency of SF-based filters operating
in subthreshold as discussed in Section V. Over a
range of CT voltage-domain analog filters discussed
in this article, we may conclude that the FVF-based
second-order filter is the best option to be adopted
for implementing edge audio devices. This is because
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IEEE CIRCUITS AND SYSTEMS MAGAZINE
1) it benefits from its intrinsic negative feedback as
the same case of the SF, 2) similar to the SSF, it builds
a BPF without additional subtraction stages, e.g., XSF
in Fig. 15, 3) it has 2× higher power-efficiency than
SSF as discussed in Section V-E, 4) its transconductors
are made of only nFETs or pFETs, which can lead
to better design compactness and thus better matching
than the SSF.
However, as shown in Section V-A with Eq. (19), the
core strength of the SF-based filter is the intrinsic feedback
within the circuit. Unfortunately, the loop gain
starts to degrade as technology scales, leading to a higher
output non-linearity assuming the transistor size also
scales. In addition, the reduced voltage headroom mainly
caused by faster VDD scaling than VTH, is expected
to further complicate the analog filter design forcing IC
designers to bring concessions in circuit performances.
To this end, an analog FEx that uses the time-domain
processing technique is recently reported in [19]. In
contrast to the voltage-domain designs, the building
blocks of the time-domain processing circuits are based
on logic gates and thus it can potentially provide better
technology scaling. In addition, it is also expected
to be developed towards a fully synthesizable analog
FEx where the layout is automatically generated from
the register-transfer level (RTL) hardware description
language. Examples of synthesizable analog circuits
include all-digital phase-locked loop (ADPLL) [65] and
ring oscillator-based ∆Σ ADC [66].
Although not discussed in this article, the DT voltage-domain
filter circuits are also promising candidates.
This is because the center frequency of the BPF
is controlled by the frequency of an external clock,
rather than gm of the transconductors, therefore ω0
can be precisely controlled over process, voltage, and
temperature (PVT) variations. A chopper-based mixer
with a sequentially varying clock frequency and a
subsequent LPF stage was used in [53] where its operational
principle is similar to that of lock-in amplifiers,
also commonly used in bio-impedance sensors
[46], [67]. This architecture achieved a 60nW ultralow-power
consumption, however, because it sequentially
demodulates over the desired frequency band,
it cannot perform the filtering operation over its entire
frequency range at once. Therefore, this design
showed a 512 ms latency until a set of filtered data is
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