IEEE Circuits and Systems Magazine - Q3 2023 - 75

end of Moore's law. In particular, spin-transfer torque
magnetic
random-access memories
(STT-MRAMs)
Figure 7. Audience in Guayaquil, at Universidad Politecnica
Salesiana.
we discussed opportunities to future engineers at the
job market on our field.
Physical Design: From Past to Future (by Ricardo
Reis). By the end of years '70s, microprocessors were
designed by hand showing excellent layout compaction.
It will be presented some highlights of the reverse engineering
of the Z8000, which control part was designed
by hand, showing several layout optimization strategies
as well an optimization of the number of transistors.
The observation of the Z8000 layout inspired the
research of methods to do the automatic generation of
the layout of any transistor network, allowing to reduce
the number of transistors to implement a circuit, and
by consequence, the leakage power reduction. Power
optimization is a main issue in the IoT world. Some of
the layout automation tools developed by our group are
briefly presented.
Deep Learning and Electrical and Computer Engineering
Design, Prospects and Challenges (by Mounir
Boukadoum). Over the past decade, deep learning has
led to great success in solving problems where previous
approaches were helpless. This success has been
mainly related to classification and, to a lesser extent,
prediction problems. However, science and engineering
also include design problems, which are usually undetermined,
and the data sets to train with are typically
limited in size. A case in point is electrical and computer
engineering (ECE) which is both an enabler and facilitator
of artificial intelligence techniques, and a user of
those techniques. The talk with outline some of today's
computational intelligence paradigms as they relate to
ECE applications, discussing prospects, and challenges.
Case studies will be presented as examples.
Assessment of Spin-Transfer Torque Magnetic
RAM (STT-MRAM) For Embedded Energy-Efficient
(by Marco Lanuzza). Memory applications non-volatile
spintronic memories represent a promising knob to
deal with the increased leakage power resulting from
the scaling down of CMOS technology towards the
based on perpendicular magnetic tunnel junctions
(pMTJs) are already on the market with potential
improvements targeting low-power and high-speed
operation, high density, high endurance, long data
retention time, low fabrication cost, and easy integration
with CMOS processes. Thanks to the above properties,
STT-MRAMs are actually considered premier
candidates for replacing conventional semiconductor-based
cache memories at more scaled technology
nodes. However, one of the main challenges for a wider
spread of STTMRAMs is the reduction of their writing
currents for both energy and area savings 5/10.
The talk is focused on non-volatile cache memories
implemented by STT-MRAMs based on state-of-theart
pMTJs, along with low-power devices like FinFETs
or TFETs.
III. Conclusion
It was a nice experience to organize the IEEE CASS Tour
Ecuador, going to two cities in two days. The participation
of professionals and students was great, and helped
to increase CASS visibility to IEEE members that are not
yet CASS members. As a great consequence of the CASS
Tour in Cuenca, it was quickly launched a new CASS Student
Branch Chapter in Cuenca. We expect an increase
in CASS membership in all visited locations.
Other CASS Tours in Latin American Countries were
organized in 2022 and 2023, and it is possible find some
reports about them in the IEEE CASS Magazine [2], [3],
[4]. Other CASS Tours are being planned as, for instance,
an IEEE CASS Tour in Peru, another one in Chile, as well
in Manaus, Brazil.
Acknowledgment
To Prof. Monica Huerta, the IEEE Cuenca Section chair,
responsible for the great logistic and organization at
Cuenca. Also, we would like to thanks Prof. Lenin Estuardo
Cevallos-Robalino for the efficient logistic and organization
at Guayaquil.
References
[1] R. Reis, R. Brum, and J. R. Azambuja, " How CASS-RS transformed local
face-to-face seminars into global webinars, " IEEE Circuits Syst. Mag.,
vol. 20, no. 4, pp. 78-87, 2020, doi: 10.1109/ MCAS.2020.3027224.
[2] R. Reis, V. Grimblatt, and M. Delgado-Restituto, " IEEE CASS Tour
Argentina 2022, " IEEE Circuits Syst. Mag., vol. 23, no. 1, pp. 87-89, 2023,
doi: 10.1109/MCAS.2023.3244430.
[3] F. Olivera and R. Reis, " IEEE CASS Rio de Janeiro Tour 2022, "
IEEE Circuits Syst. Mag., vol. 23, no. 2, pp. 64-65, 2023, doi: 10.1109/
MCAS.2023.3267939.
[4] R. Reis and R. Murphy, " IEEE CASS Tour Mexico 2022, " IEEE Circuits
Syst. Mag., vol. 23, no. 2, pp. 66-70, 2023, doi: 10.1109/MCAS.2023.3267987.
THIRD QUARTER 2023
IEEE CIRCUITS AND SYSTEMS MAGAZINE
75
IEEE Circuits and Systems Magazine - Q3 2023

Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q3 2023
