IEEE Consumer Electronics Magazine - July 2018 - 92

PROBLEM FORMULATION

proposed approach yields a significant
average reduction in design cost.

The proposed approach
optimizes an IP design
through multiple
transformations based
on algebraic laws.

METHODOLOGY
OVERVIEW
The proposed approach aims to optimize
the functionality of an application during
architectural synthesis. It generates a structurally optimized data path and controller
designs for a reusable IP core via multiple
algebraic-law-based transformation techniques. As shown in Figure 1, the proposed approach accepts a DSP application
in the form of a data flow graph (DFG),
transforms the structure of an application,
and finally explores a low-cost solution

.167

x (n ) x (n - 3)

(1) ×

(2)

(4)

×

through the BFOA. Though the optimization is performed through the three laws of
algebra, none affects the final output of the
design, so the functionality of the transformed design remains unchanged. Finally, a low-cost, optimized IP core design is
generated that satisfies the user-specified
area-latency constraints.

.50

x (n - 1) x (n - 2) .33

y (n - 2)

(3)

×

×

(6)

×

(8)

+
(7)

+

(9)

+
y (n )

FIGURE 2. The original DFG of the IIR filter.

.167

x (n ) x (n - 3)

(1)

(4)

+

.50

x (n - 1) x (n - 2) .33

y (n - 2)

(3)

×

×

(6)

×

×

(5)

A trf (X i) - A cons
m
A max
L trf (X i) - L cons
m, (1)
+ z2 c
L max

C trf (X i) = z 1 c

where C trf (X i) is the normalized design
cost for the Xi design solution; A trf (X i)
and L trf (X i) are the total area and latency of the design, respectively, for design
solution X i; A max and L max are the maximum possible value of the design area
and design latency, respectively, in the
pool of design solutions; and z 1 and z 2
are weights for area and latency, respectively, that lie between zero and one.

MULTISTAGE TRANSFORMATION
PROCESS
DISTRIBUTIVE-LAW-BASED
TRANSFORMATION

+

(5)

From a given DFG and the user-specified
area constraints (A cons) and latency constraints (L cons), we explore the low-cost
design solution. The design cost is evaluated based on the following function:

+
(7)

+

(9)

+
y (n )

FIGURE 3. The distributive-law-based transformed design.

92 IEEE Consumer Electronics Magazine

^

July 2018

(8)

In the proposed approach, the first algebraic-law-based transformation applied is the
distributive law to structurally transform a
DFG DSP design. According to the distributive law, adding two numbers and
then multiplying the sum by a third number is equivalent to multiplying the first
two numbers by the third number individually and then calculating their sum. For
example, in the original DFG shown in
Figure 2, the primary inputs of the graph
are shown in the rectangular boxes, where
x ^nh is the present input; x ^n - 1h and
x ^n - 2h are the inputs after a single- and
double-unit delay, respectively, for the filter in the time domain; and y ^nh and
y ^n - 2h represent the current and the previous output, respectively, of the filter in
the time domain. Both x ^nh and x ^n - 3h
are multiplied by the same value (i.e.,
.167) in operations 1 and 2, respectively,
and operation 4 adds the output of operations 1 and 2. The distributive-law-based
transformed design is shown in Figure 3.

ASSOCIATIVE-LAW-BASED
TRANSFORMATION
The second algebraic-law-based transformation applied to further optimize the
Table of Contents for the Digital Edition of IEEE Consumer Electronics Magazine - July 2018
