IEEE Consumer Electronics Magazine - November/December 2019 - 89

Figure 2. Prototype under full load.

prototype. Also, safety chip was not including
AUTOSAR classic stack but used demo-grade
RTOS stack instead. The prototype consisted of
RT-RKs ALPHA automotive development platform (ADP)7 which provides three SoCs from TI
(TDA2x), PCI-E and Ethernet interconnections,
as well as 10 shared LVDS camera inputs for
vision-based algorithms. These SoCs in the prototype acted as Worker chip, Safety ship, and
Extra chip, respectively. Fourth, SoC was Qualcomm Snapdragon S820A provided at Intrinsic
ADP, serving as a master chip, with three HDMI
outputs for digital cockpit screens. The master
chip software comprised of a stack as described
in the design: QNX Hypervisor with Linux (running AA 18-03) and Android, with applications
for cluster, HUD, HU, bird view, rear view and
driver monitoring, all sharing the same SoC. All
other units were utilizing software stacks with
RTOS-only (SysBios) and agent proxy concept.
Figure 2 shows the PoC prototype in action. Digital cockpit applications were interlinked with
ADAS applications by means of receiving alerts
(driver distraction, traffic in nearby lanes) and
showing them on screens and by vibrations in
the specially designed seat cover.
While executing a use case of simulated driving-applying actions on the steering wheel and
receiving alerts regarding driver monitoring and
lane traffic-we measured the performance

November/December 2019

of the system. Algorithm performances were
adequate, most of the times within 1-2 camera
frames @30fps (within 60 ms), what is the acceptable latency (for example, camera monitor systems are required to form an image at 55-ms
latency, according to ISO165058). Median measurements of CPU and Memory loads are shown,
per core/application, in Table 2. It is obvious
that the PoC for the selected set of algorithms
was successful, with some additional room for
resource utilization. We shall be cautious, however, since the introduction of full deterministic
stacks would consume more resources than
shown in this experiment, when additional optimizations may need to be applied.

WHERE NEXT
The future of the central car computer is
bright and very much needed. The moment to
move forward on the discussed central car computing paradigm is now, since Level 4 and 5
autonomous cars are predicted (and expected!)
for 2025 by many, and the only viable route for
this implementation is a unified, software-based
dynamic architecture. Heterogeneity is back in
its full charm; software architectures which
cope well with various hardware accelerations,
regarding GPUs and DSPs as key processing
blocks, will play their major part. Here, of

89



IEEE Consumer Electronics Magazine - November/December 2019

Table of Contents for the Digital Edition of IEEE Consumer Electronics Magazine - November/December 2019

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