IEEE Consumer Electronics Magazine - July/August 2021 - 100

Physical Unclonable Function
demonstrated the integrated TRNG-PUF architecture
based on field programmable gate array6 and
CMOS.7,8 However, to the best of our knowledge,
there is no existing work on integrated TRNG-PUF
design based on PV solar cells. Therefore, this article
proposes integrated TRNG-PUF architecture
devised around a common entropy source of PV
solar cells. Furthermore, the proposed architecture
does not require additional hardware and
can be ported across the existing framework.
Figure 1. Building security primitives from solar
cells and sensors in CPS.
To build hardware security primitives, e.g., true
random number generator (TRNG) and physically
unclonable function (PUF) from sensors in CPS,
could be a novel research direction. TRNG is useful
to generate secret key, initialization vector,
padding, nonce, and salt bits in cryptographic
framework.4 On the other hand, PUF exploits the
manufacturing variation of the device to produce
a reliable, unclonable unique ID that can be used
to authenticate sensors and generate a secret key.
The photovoltaic (PV) solar cell panels are preferred
way to harvest solar energy in CPS and
thereby, PV solar sensors find commonplace in
many CPS.5 Therefore, designing TRNG and PUF
using sensors (in our case PV solar cell sensor)
and microcontroller-based computing platform is
a novel research direction.
The integration of TRNG and PUF as integrated
architecture is a challenging task because of the
fundamental difference of the PUF and TRNG
design. There are existing works that have
INTEGRATED TRNG-PUF
ARCHITECTURE
The proposed prototype shown in Figure 2
operates in two modes: 1) training and 2) run.
The training mode learns the entropic nature
of PV solar cells. The mean value (m) and
standard deviation (SD) (s) of each solar cell
voltage histogram is recorded. Additionally,
the training mode sets an optimal sampling
interval, a vital step to set optimum TRNG
throughput. The detailed explanations are
presented in the subsequent sections.
The run mode segregates sensor response in
either dynamic (large variation) response to
produce TRNG output or static (stable)
response to generate PUF output. The prototype
has an option to enter in training mode
before producing each TRNG/PUF response.
The updated training information can reflect
the change in response due to light intensity
variations.
TRNG BITS Generation
The TRNG transform randomness in entropic
source to generate random bits. The proposed
prototype produces initial binary streams by
Figure 2. Schematic of integrated TRNG-PUF architecture.
100
IEEE Consumer Electronics Magazine

IEEE Consumer Electronics Magazine - July/August 2021

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