IEEE Consumer Electronics Magazine - July/August 2021 - 109

Figure 3. Network model and message exchanges.
Figure 4. (a) High-level illustration of d-ROPUFdesign. (b) d-ROPUF design is split mapped on Artix-7 FPGAs.
impersonate anSM to retrieve the hardware-based
fingerprints. Additionally, a malicious eavesdropping
attack may aim to learn the secret SM keys,
which is prevented by the encrypted keys, i.e.,
using the lightweight encryption in this case.
PROPOSED AMI AUTHENTICATION
SCHEME
Figure 4(a) illustrates the proposed PUF
design for the authentication scheme. The proposed
scheme uses a d-ROPUF that is capable of
reconfiguring itself into four different RO stages
structures for generating highly unclonable and,
thus, strong secret keys that are less susceptible
to cloning, modeling, and machine learning
July/August 2021
attacks. Two signals, R1 and R2, are generated
by the reconfiguration mechanism and connected
to internal multiplexers (i.e., F5 and F6)
to configure to a new PUF structure. Figure 4(a)
also shows four RO stage structures (i.e., 1, 3, 5,
and 7 stages) with different colors that are,
respectively, green, blue, gold, and purple. The
design is area efficient and is implemented onto
a small FPGA area (single CLB). The high signals
(red lines) are connected to configure LUTs as
inverters, as shown in Figure 4(a).
The PUF design is realized on Artix-7 family of
FPGAs, which is demonstrated in Figure 4(b).
The RO structures are identically instantiated,
with fixed CLB routing, using a hard-macro procedure
that eliminates the dynamic delay
109

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