IEEE Consumer Electronics Magazine - November/December 2021 - 57
These non-volatile eMRAM cells have 3 different
p-MTJ sizes, indicated by the yellow, blue and
green rectangles.
The Sony paper shows how MRAM could proFigure
1. Types of MRAM Memory Compared to
eFlash, SRAM and DRAM (©2021 The Japan Society
of Applied Physics).
vide useful buffer memory for cameras and other
imaging devices. This could be combined with
MRAM enabled trained AI inference models for
image recognition and image analysis for many
consumer applications.
TSMC says that CIS scaling for use in products
such as smart phones has increased considerable
over the last few years, going from
5Mpixels in 2010 to >150Mpixels in 2021 with
the pixel sizes decreasing over the same period
from 1.75 mmto <0.6mm3. They also talked about
display devices moving from traditional TFT displays
to near-eye Si-based displays with 10X the
pixel density, higher resolution, lower latency,
lower weight and using less power.
Emerging memory technologies such as
MRAM and RRAM will enable future generations
of image and display devices with intelligent AI
capabilities providing a better visual experience
and enabling many new applications.
Figure 2. eMRAM Fusion Chip with High Data
Retention and Low Data Retention STT-MRAM
(©2021 The Japan Society of Applied Physics).
They found that the CIS process had a strong
impact on the magnetic characteristics of the
MRAM memory cells, but they were able to find
a material composition that gave good and predictable
magnetic characteristics. This composition
also required a lower voltage to achieve the
target bit error rate (BER) for the memory cells.
They used this technology to build an eMRAM
fusion chip that combined high data retention
and low data retention (buffer memory) eMRAM
cells as shown in Figure 2.
In this figure the 30Mbit eMRAM Macro is the
low retention buffer memory and 1 Mbit eMRAM
Macros are high retention (non-volatile) cells.
There are 10 of these 1 Mbit cells on the chip.
&REFERENCES
1. T. Coughlin, MRAM comingto consumerproducts,
IEEEConsum. Electron. Mag., vol. 10, no. 2,
pp. 51-52, Mar. 2021.
2. AI Inference and Storage, IEEEConsum. Electron.
Mag., vol. 9, no. 1, Jan. 2020.
3. K. Zhang, in Proc. TSMCSVP, TSMC2021 North Amer.
Technol. Symp., Jun. 2021.
4. M. Oka, 3D StackedCIS Compatible 40nmEmbedded
STT-MRAM for Buffer Memory, and, Sony semiconductor
solutions corporation, in Proc. Symp.VLSITechnol.
Circuits, Jun. 2021, pp. Paper T2-5.
Tom Coughlin is the President of Coughlin Associates,
Atascadero, CA, USA. He is a regular storage
and memory contributor for forbes.com and M&E
organization websites. He is an IEEE Fellow, PastPresident
of IEEE-USA, and is active with IEEE, SNIA
and SMPTE. Contact him at tom@tomcoughlin.com.
November/December 2021
57
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IEEE Consumer Electronics Magazine - November/December 2021
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