Special Section on Security and Sustainability Technologies for Smart Cities Figure 10. One round of PRESENT-80 implemented in 2-EE-SPFAL. SPECIFIC CASE STUDY ON PRESENT-80 PRESENT: Lightweight Encryption PRESENT13 is a lightweight cipher. PRESENT has low area overhead which makes it an ideal candidate for smart electronic circuits that look to balance area and security. PRESENT supports key lengths of 80 or 128 bits. As the goal of this article is lowenergy, we decided to use an 80-bit key. PRESENT-80 implemented in CMOS is susceptible to side-channel attacks such as CPA. Many countermeasures against CPA attacks are not suitable for smart electronic devices as they consume large amounts of power thus we explore to design PRESENT-80 using 2-EE-SPFAL. 2-EE-SPFAL Implementation of PRESENT-80 CMOS implementation of PRESENT-80 is susceptible to CPA attacks and consumes large amounts of energy and thus is not suitable for low power smart electronic devices. In this section, we discuss the implementation of one round of PRESENT-80 with 2-EE-SPFAL. 2-EESPFAL requires two sinusoidal clocks 180 out of phase. Figure 10 shows the implementation of 1-round of PRESENT 80. The AddRoundKey stage is operated by f1, the S-Box stage consists of both f1 and f2 where f1 and f2 are the two respective power clocks. PRESENT-80 implemented with 2-EE-SPFAL and an integrated clock generator leads to more secure operation from uniform current consumption as seen in Figure 11. The uniform current traces during the operation of PRESENT-80 will prevent information leakage as we will see when a CPA is performed. Figure 12 and Table 2 show the energy per cycle of both the CMOS and 2-EE-SPFAL implementation of PRESENT-80 as a function of frequency. From Figure 12 and Table 2, we can see that when using sinusoidal power clocks, 2-EE-SPFAL consumes less energy than its CMOS counterpart through 25 MHz. We can see that at 12.5 MHz, there is an average energy saving of 24.67% between CMOS and 2-EE-SPFAL based designs. From 100 kHz to 25 MHz, our results show an average energy saving of 76.5% to 21.3% between CMOS and 2-EE-SPFAL with clock generator implemented. CPA Attack on PRESENT-80 2-EE-SPFAL based implementation of PRESENT-80 has been shown to reduce energy when Figure 11. Uniform current traces of PRESENT-80 implemented with 2-EE-SPFAL and clock generator. 62 Figure 12. Energy per cycle of PRESENT-80 implemented in CMOS and 2-EE-SPFAL. IEEE Consumer Electronics Magazine