IEEE Consumer Electronics Magazine - January/February 2022 - 89

Figure 1. Hybridizing approximate computing and
adiabatic logic can reduce the power consumption
and area while increasing the security for edge
computing.
However, the cybersecurity solutions are not yet
fully addressed.3,4 Yellu et al.3 pointed out that an
approximate adder has a positive correlation
between output and power consumption, which
increases as the error rate increases. Additionally,
reverse-engineering would be easier since
the non-approximate circuit, such as cryptography,
runs in a lower frequency or lower supply
voltage when compared to the approximate circuit.4
Adversaries could launch several attacks
on the approximate circuits, such as side-channel
attack and reverse engineering.4,5
Adiabatic logic provides energy-efficient computing
by recycling the energy stored in the load
capacitor.6 In nature, adiabatic logic families are
mostly dual-rail. Thus, the adiabatic design has
more number of transistors compared to the
standard CMOS. In this article, we will demonstrate
that by using approximate computation
with adiabatic logic, it is possible to generate
energy-efficient, low-power, and reduced area
circuits (see Figure 1). We will demonstrate with
the case study of a full adder that the approximate
circuits can provide resistance against
side-channel attacks, such as differential power
analysis (DPA) attacks when implemented with
adiabatic logic.
This article shows that the dual-rail adiabatic
logic can be used in the full adder to approximate
the sum or the carry output. This will help
to design energy-efficient, low-power, and secure
circuits with fewer transistors. The two designs
of approximate full adders presented in this article
are true sum approximate adder (TSAA) and
True Carry-out Approximate Adder (TCAA).
January/February 2022
TSAA approximates the Carryout on the basis of
the precise Sum, and similarly, TCAA approximates
the Sum on the basis of the precise
Carryout. To implement the two approximate
adders, energy-efficient secure positive feedback
adiabatic logic (EE-SPFAL) is used.7 The simulation
results illustrate that EE-SPFAL-based TCAA
design yields more savings, less error, and
smaller than EE-SPFAL-based TSAA design. We
also illustrate that the EE-SPFAL-based TSAA is
more secure than EE-SPFAL-based TCAA.
BACKGROUND
Principle of Energy Recovery
In current CMOS technology, to charge an
output node of capacitance, CL, CLV2
is delivered by the power supply. Out of CLV2
energy, 1/2 CLV2
dd of energy
dd of
dd of energy is stored in CL,
whereas the other half is dissipated in a path
consisting of a transistor channel. In contrast to
traditional CMOS circuits, energy recovery circuits
are low-energy as they employ the principle
of adiabatic switching by charging the
capacitance gradually and recycling the charge
at the end of each cycle 6.
Power-Analysis-Based Side-Channel Attacks
Side-channel attacks can reveal the secret
key based on the information obtained from the
cryptographic hardware. Side-channel attacks
include power attacks, timing attacks, and electromagnetic
attacks, etc. Furthermore, the
power analysis attack can be classified as simple
power analysis (SPA), DPA, and correlation
power analysis (CPA). SPA: An attacker directly
observes a device's power consumption to
determine the key of the cryptographic algorithm
being used. DPA: A type of side-channel
attack, which can reveal the secret key of a cryptographic
device by statistically analyzing the
correlation between the processed data and the
power traces. CPA: The enhancement of DPA,
which derives the correct key by using the correlation
coefficient of statistics between the power
traces and the values of intermediate result of
the key guess. These attacks are used in conjunction
with hypothetical power models to reveal
the secret key.
89
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