IEEE Consumer Electronics Magazine - July 2017 - 129

0
X

2
a

2
a
p-1
Clk

Payload

p-1

Trigger

Payload

Trigger
AB

FIGURE 5. A synchronous counter sequential-triggered hardware Trojan.

FIGURE 6. An asynchronous counter
sequential-triggered hardware Trojan.

THE TRIGGERED HARDWARE
TROJAN: THE SYNCHRONOUS AND
ASYNCRONOUS SEQUENTIAL TYPES

During a functional verification/
simulation test, En is always kept on
(by feeding logic 1 in the test bench) by
the design verification team, as they
would falsely assume it to be a circuitenable signal (without being aware that
it is designed in disguise to act as a
trigger signal for the Trojan). Under
En = 1, the BCD adder circuit would
behave normally, thus passing the register transfer level simulation/functional verification test. This is because the
Trojan would have only been activated
under a rare event (e.g., resetting of the
enable, i.e., En = 0, which the design
integrator would normally never make
during a verification test). Thus, after
integration, whenever the IP En signal
remains off, it continues to work maliciously (due to Trojan logic activation)
and impacts the remaining system by
providing the wrong output value [5].

The synchronous and asynchronous
sequential types of hardware Trojans
are triggered when the counter reaches
a certain amount. For either type, once
triggered, the output functionality of
the circuit starts malfunctioning [3].
In Figure 5, for the synchronous sequential type, there are p counters working asynchronously under the influence
of the clock signal. In Figure 6, for
the asynchronous sequential type, the p
counters are working asynchronously
under the rising transitions of AND-gate
output (fed with inputs A and B) instead
of a common clock. For either type, the
red wire carries the triggering output for
affecting the payload block.
When the count reaches 2 p - 1, the
Trojan is triggered and the circuit
produces an incorrect output (X *) instead
of a correct output ^Xh. Such types of
modifications done by an adversary are
also called the Time-Bomb Hardware
Trojan, as the triggering occurs after a
certain predefined time event.

THE PAYLOAD-BASED HARDWARE
TROJAN: RESULTING IN
FUNCTIONAL CHANGE
This type of hardware Trojan covertly
affects the payload of the circuit,
resulting in functional changes such as
an alteration in the produced computational value at the output. Figure 7
shows such an example, where a binary
coded decimal (BCD) adder circuit
black box comprises of three input signals, Enable (En), A (4 b), and B (4 b),
and the output signal O 3 O 2 O 1 O 0 .

THE PAYLOAD-BASED HARDWARE
TROJAN: RESULTING IN
PERFORMANCE DEGRADATION
The circuit itself is stealthily affected by
this type of hardware Trojan through
triggering, but this results in no functional change besides an occasional performance degradation. This means that after
the Trojan block is activated, although
the functional output always remains the
same, a few occasions produce outputs
after some delay, resulting in the aforementioned performance degradation.
Thus, the Trojan goes undetected during
functional verification.
Figure 8 provides an example of this
type of hardware Trojan. The figure
shows that, for inputs A = 0 and any
input value of B (1 or 0), there will be a
delayed output of Sum (S) because of
the triggering in the adder block. This is
because a black box design appears normal when it is purchased from a thirdparty vendor, but, internally, there are
extra logics (i.e., the Trojan) appended
with the 1-bit adder by some adversary.
Nevertheless, when A = 1, there is
no delay because the Trojan block is not
triggered (the delay that is caused by the
inverter output would be ignored and
considered as the input to the multiplexer). This type of Trojan may be secretly
inserted by a third-party adversary into
an adder block (or similar blocks) during product designing to cause occasional, unexpected timing violations (and

Cout

4-Bit Binary Adder

OR
1

1
0
En

1
4-Bit Binary Adder

Gnd
Trigger

O3O2 O1 O0 Payload

FIGURE 7. The Trojan logic inserted by an adversary in a BCD Adder IP (inputs A and B);
Note: When Enable (En) = 0 (rare event), then Trojan blocks get activated and produces
incorrect computational output (O 3 O 2 O 1 O 0) [3].

JULY 2017

IEEE Consumer Electronics Magazine

129

Table of Contents for the Digital Edition of IEEE Consumer Electronics Magazine - July 2017