IEEE Geoscience and Remote Sensing Magazine - December 2022 - 137

using OpenMP alone in the field of remote sensing big
data processing, and mixed programming with the MPI
and a GPU is often used to achieve higher computing efficiency.
Wang et al. [186] implemented a hybrid parallel
program ensemble square root filter based on the MPI +
OpenMP, which handled communication among nodes
by the MPI and within shared memory nodes by OpenMP.
This program achieved significant acceleration on multicore
supercomputers.
Chang et al. [32] put forward a remote sensing image
parallel k-dimensional tree classification method based on
the MPI + OpenMP + CUDA cluster environment, which
realizes data exchange and resource load balancing among
cluster computers by the MPI and the parallel computing
of a CPU and a GPU by OpenMP and CUDA. The proposed
method has significantly improved the computing
speed and classification accuracy. To maximize the parallel
computing ability of the cluster, Ye et al. [248] proposed a
dynamic task allocation strategy for the parallel computing
process of remote sensing image land use classification,
such as determining the number of tasks according
to whether the computers in the cluster are equipped with
a GPU or not and realizing the parallel program of the dynamic
allocation of computing resources by a mixed programming
model of the MPI + OpenMP.
FIELD-PROGRAMMABLE GATE ARRAY
The field-programmable gate array (FPGA) is a kind of
reconfigurable circuit chip and hardware architecture.
Users can change their application scenario at any time
by programming, and the FPGA can simulate various
parallel operations of the CPU, GPU, and other hardware.
Through a high-speed interface with the target
hardware, the FPGA can complete the low-efficiency part
of the target hardware, which realizes acceleration at the
system level.
To obtain the ability to process remote sensing images
in real time, many scholars have carried out related research
based on the FPGA. For example, González et al.
[74] proposed an endmember extraction algorithm for
PPI hyperspectral images, which can obtain (near) realtime
processing results with compact hardware size, and
this method can be easily transplanted to larger FPGAs.
Li et al. [104] proposed an FPGA-based crown detection
method for large-scale remote sensing images. The algorithm
balances the utilization strategies of different resources,
such as look-up tables, digital signal processors
(DSPs), and memory bandwidth, and avoids any of them
becoming a performance bottleneck. Compared with Intel's
12-core 2.4-GHz CPU, it achieves a speed up of 18.75×.
Liu et al. [108] introduced a geographic reference method
for spaceborne remote sensing images based on the FPGA
and realized the processing of a second-order polynomial
and bilinear interpolation algorithm, which achieves the
real-time acquisition of geographic references of remote
sensing images.
DECEMBER 2022 IEEE GEOSCIENCE AND REMOTE SENSING MAGAZINE
The FPGA has the advantages of small size, light weight,
and low energy consumption, which makes it especially
suitable for applications in scenarios with limited energy
consumption and load budgets on platforms such as satellites
and aircraft. To realize the real-time onboard processing
of remote sensing images, Williams et al. [190] implemented
a cloud detection algorithm based on the HPC-1
platform, which is designed based on a Xilinx XQR 4062
FPGA. The payload is small, the size is only 195 × 165 × 35 mm,
the running power consumption is about 2.5 W, and the
processing speed is 1.3 ms (256 × 256; 50 megapixels/s),
which effectively reduces the onboard storage and downlink
capacity requirements. Visser et al. [179] implemented
the adaptive JPEG Lossless Standard remote sensing image
compression algorithm on the same HPC-1 platform to
achieve real-time spaceborne image compression.
Zheng et al. [227] proposed an acceleration algorithm
for target detection based on the FPGA and You Only Look
Once (YOLO) v3-tiny. Through the parallel strategy of each
convolution layer, the resource utilization and computing
speed were improved, and a high-performance low-power
hardware accelerator for spaceborne real-time target detection
in remote sensing images was realized. Pakartipangi et al.
[140] realized the synthetic aperture optical imaging of
four cameras by an FPGA for remote sensing image acquisition
from very small artificial satellites (nanosatellites) and
obtained images with both details and coverage area under
conditions of limited weight, size, and power consumption.
In addition, compared with CPU and GPU computing,
the FPGA has obvious advantages in energy efficiency while
obtaining HPC, which can be used in low-energy scenarios.
Zhang et al. [223] implemented a high- performance
deep convolutional NN (CNN) remote sensing image classification
accelerator based on the FPGA. An efficient hardware
architecture was obtained by adopting a dual-channel
double-data-rate synchronous dynamic RAM access mode
and on-chip data processing optimization strategy. Compared
with a CPU and GPU, the energy efficiency of the
accelerator increased by 174.53 and 11.51×, respectively.
Wei et al. [188] proposed a hybrid-type inference method
based on a symmetric quantization scheme for classifying
remote sensing images by a CNN based on an FPGA. Compared
with floating-point implementation, the power consumption
of the look-up table, flip-flop, DSP, and block
RAM was reduced by 46.21%, 43.84%, 45%, and 51%,
respectively. Zhang et al. [221] implemented an improved
YOLO v2 remote sensing image target detection method on
an FPGA and designed a collaborative hardware/ software
framework with good universality and flexibility. Compared
with a CPU, it achieved a speed up of 33.4× and
energy consumption of only 5.96 W.
HIGH-PERFORMANCE REMOTE SENSING
PROCESSING SYSTEM
In the field of remote sensing image processing, some professional
HPC platforms have emerged and been widely
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IEEE Geoscience and Remote Sensing Magazine - December 2022

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