IEEE Solid-States Circuits Magazine - Spring 2019 - 77

communications link. Almost every
protocol requires some form of sideband signaling for control, interrupt
handling, or initial setup, and this is
often achieved through secondary
I2C, SPI, or similar buses. However,
these secondar y buses consume
additional pins on a device or printed
circuit board; thus, there is always a
desire to minimize reliance on them.
The unmapped words in C-PHY offer
the potential, at least in principle,
to drastically minimize reliance on
sideband buses, in that sideband
messages may be sent within the trio
without corrupting the main packet
transmissions. Currently, some lowpower mobile applications rely on
C-PHY's sideband capability for communicating control commands without requiring extra pins.

Conclusions
This article introduced the C-PHY
signaling standard, a new multiconductor solution enabling data
transfer bandwidth efficiencies over
constrained transmission channels through multilevel signaling
supporting approximately 2.3 b of
information per UI. The concept of
three-phase encoding, along with
circuit-level techniques and considerations for implementing this
innovative scheme, was introduced,
as were the higher-level mapping
requirements and some of the protocol-level implications, including
ease of clock recovery and efficient
sideband signaling using unmapped
words. With this implementation,
C-PHY represents an incarnation of a
new class of digital buses that break
the mold of conventional signaling,

combining the benefits of singleended and differential signaling
to keep the pin count low without
sacrificing immunity to electromagnetic noise.

References

[1] S. Karp, E. L. O'Neill, and R. M. Gagliardi, "Communication theory for the freespace optical channel," Proc. IEEE, vol. 58,
no. 10, pp. 1611-1626, 1970.
[2] M. Shimanouchi, M. P. Li, and D. Chow,
"New modeling methods for bounded
Gaussian jitter (BGJ)/noise (BGN) and
their applications in jitter/noise estimation/testing," in Proc. IEEE Int. Test Conf.,
2009, pp. 1-8.
[3] B. T. Murphy, "Cost-size optima of monolithic integrated circuits," Proc. IEEE, vol.
52, no. 12, pp. 1537-1545, Dec. 1964.
[4] A. Boni, A. Pierazzi, and D. Vecchi, "LVDS
I/O interface for Gb/s-per-pin operation
in 0.35-/spl mu/m CMOS," IEEE J. SolidState Circuits, vol. 36, no. 4, pp. 706-711,
Apr. 2001.
[5] A. X. Widmer and P. A. Franaszek, "A
dc-balanced, partitioned-block, 8B/10B
transmission code," IBM J. Res. Develop.,
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[6] M. Hossain and A. Carusone, "A 6.8mW
7.4Gb/s clock-forwarded receiver with up
to 300MHz jitter tracking in 65nm CMOS,"
in Proc. IEEE Int. Solid-State Circuits Conf.,
2010, pp. 158-159. doi: 10.1109/ISSCC.
2010.5434007
[7] G. A. Wiley, "Three phase and polarity encoded serial interface," U.S. Patent
8,064,535, 2011.
[8] A. K. Martin, B. K. Casper, and J. T. Kennedy, "Voltage-mode driver with preemphasis, slew-rate control and source
termination," U.S. Patent 6,704,818, 2004.
[9] "MIPI Alliance Specification for C-PHY," MIPI
Alliance, 2016. [Online]. Available: https://
www.mipi.org/specifications/c-phy

About the Authors
Philippe Lancheres (philippe.lanch
eres@introspect.ca) received his
B.Eng. degree in electrical engineering from McGill University, Montréal,
Canada, in 2009. He is a senior member of the technical staff at Introspect
Technology, Montréal, Canada, which
creates multi-Gb/s test and measurement equipment for development,
bench validation, and high-volume

manufacturing. He pioneered the
development of Introspect Technology's ultracompact, high-performance
test and measurement tools, innovating in areas of pattern generation,
data capture, protocol analysis, signal
integrity analysis, and jitter injection.
He was also central to the development
of the world's first MIPI C-PHY test and
measurement tools, an achievement
that earned him the finalist position
for the DesignCon 2015 Engineer of
the Year Award. His research interests
include the design of digital CDRs and
gigabit transceivers.
Mohamed Hafed (mohamed.hafed@
introspect.ca) received his B.Eng.,
M.Eng., and Ph.D. degrees in electrical engineering from McGill University, Montréal, Canada, in 1997, 1998,
and 2003, respectively. He is the chief
executive officer of Introspect Technology, Montréal, Canada, a leading manufacturer of innovative test
and measurement products for highspeed digital applications. A test
industry pioneer, he has published numerous articles on the topic of analog
test and built-in test, and he was the
principal inventor on several patents
related to signal integrity test and
measurement. He was the recipient of
the prestigious Government of Canada Network of Centers of Excellence
Young Innovator Award, several best
paper awards at industry conferences,
and the D.W. Ambridge Prize for the
most outstanding Ph.D. dissertation
in physical sciences and engineering
at McGill University. He is interested in
creating and marketing innovative test
and measurement solutions for the
high-speed interface industry.

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IEEE Solid-States Circuits Magazine - Spring 2019

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